Manuale d’uso / di manutenzione del prodotto SUPER X5DLR-8G2 del fabbricante SUPER MICRO Computer
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® SUPER X5DL8-GG SUPER X5DLR-8G2+ SUPER X5DLR-8G2 USER’S MANUAL Revision 1.0c S UPER.
The information in this User’s Manual has been carefully reviewed and is believed to be accurate. The vendor assumes no responsibility for any inaccuracies that may be contained in this document, makes no commitment to update or to keep current the information in this manual, or to notify any person or organization of the updates.
iii Preface Preface About This Manual This manual is written for system integrators, PC technicians and knowledgeable PC users. It provides information for the installation and use of the SUPER X5DL8-GG/X5DLR-8G2+/X5DLR-8G2 serverboard. At launch, the SUPER X5DL8-GG/X5DLR-8G2+/X5DLR-8G2 supported single or dual Intel ® Xeon TM 1.
iv S UPER X5DL8-GG/X5DLR-8G2+/X5DLR-8G2 User’s Manual Preface About This Manual ...................................................................................................... i i i Manual Organization ........................................
Table of Contents v HDD LED .................................................................................................... 2 -9 NIC1 LED ................................................................................................... 2- 9 NIC2 LED .
S UPER X5DL8-GG/X5DLR-8G2+/X5DLR-8G2 User’s Manual vi PCI-X Bus Speed Setting (X5DLR-8G2/X5DLR-8G2+) ...................... 2-19 33 MHz PCI Enable/Disable ................................................................... 2-19 Front Side Bus Speed .
Chapter 1: Introduction 1-1 Introduction Chapter 1 Introduction 1 - 1 Overview Checklist Congratulations on purchasing your computer motherboard from an ac- knowledged leader in the industry. Supermicro boards are designed with the utmost attention to detail to provide you with the highest standards in quality and performance.
S UPER X5DL8-GG/X5DLR-8G2+/X5DLR-8G2 User’s Manual 1-2 Introduction Contacting Supermicro Headquarters Address: SuperMicro Computer, Inc. 980 Rock Ave. San Jose, CA 95131 U.S.A. Tel: +1 (408) 503-8000 Fax: + 1 (408) 503-8008 Email: marketing@supermicro.
Chapter 1: Introduction 1-3 Introduction Notes.
S UPER X5DL8-GG/X5DLR-8G2+/X5DLR-8G2 User’s Manual 1-4 Introduction Figure 1-1. SUPER X5DL8-GG Image.
Chapter 1: Introduction 1-5 Introduction Figure 1-2. SUPER X5DLR-8G2 Image Note: the X5DLR-8G2+ has the same layout but has 1) no parallel (printer) port and 2) a standard PCI-X slot.
S UPER X5DL8-GG/X5DLR-8G2+/X5DLR-8G2 User’s Manual 1-6 Introduction Figure 1-3. SUPER X5DL8-GG Layout (not drawn to scale) Note: DIP Switch 4 sets the CPU Core/Bus Ratio (see Section 2-7). CR5 is a power LED indicator (see Section 2-6). Jumpers not noted are for test purposes only.
Chapter 1: Introduction 1-7 Introduction X5DL8-GG Quick Reference Jumper Description Default Setting J 29 33 MHz PCI Enable/Disable Open (Disabled) J 35 Spread Spectrum Open (Disabled) J A4 SCSI Enable/Disable Pins 1-2 (Enabled) JBT1 CMOS Clear See Chapter 2 JP 2 PCI 3.
S UPER X5DL8-GG/X5DLR-8G2+/X5DLR-8G2 User’s Manual 1-8 Introduction Figure 1-4. SUPER X5DLR-8G2 Layout* (not drawn to scale) Note: the X5DLR-8G2+ has the same layout but has 1) no parallel (printer) port and 2) a standard PCI-X slot.
Chapter 1: Introduction 1-9 Introduction X5DLR-8G2+/X5DLR-8G2 Quick Reference Jumper Description Default Setting J 35 Spread Spectrum Open (Disabled) J A4 SCSI Enable/Disable Pins 1-2 (Enabled) JBT1 C.
S UPER X5DL8-GG/X5DLR-8G2+/X5DLR-8G2 User’s Manual 1-10 Introduction Motherboard Features CPU • Single or dual Intel ® Xeon TM 1.50 - 3.20 GHz 604/603-pin processors with a 1 MB cache at a front side (system) bus speed of 533/400 MHz.
Chapter 1: Introduction 1-11 Introduction ACPI Features • Microsoft OnNow • Slow blinking LED for suspend state indicator • Main switch override mechanism • External modem ring-on Onboard I/O .
S UPER X5DL8-GG/X5DLR-8G2+/X5DLR-8G2 User’s Manual 1-12 Introduction N o rth B ri dg e (C M I C- W S ) 533/400 M H z H ost B us 266/200 M H z Me mo r y B u s A T A 100 P o rts CI OB X 2 (I O B r i d.
Chapter 1: Introduction 1-13 Introduction 1- 2 Chipset Overview The ServerWorks Grand Champion LE TM is a high-performance work station SystemSet core logic chipset that consists of a North Bridge, a South Bridge and an IO bridge.
S UPER X5DL8-GG/X5DLR-8G2+/X5DLR-8G2 User’s Manual 1-14 Introduction on state. See the Power Lost Control setting in the Advanced BIOS Setup section (Peripheral Device Configuration) to change this setting.
Chapter 1: Introduction 1-15 Introduction System Resource Alert This feature is available when used with Intel's LANDesk Client Manager (optional).
S UPER X5DL8-GG/X5DLR-8G2+/X5DLR-8G2 User’s Manual 1-16 Introduction Microsoft OnNow The OnNow design initiative is a comprehensive, system-wide approach to system and device power control. OnNow is a term for a PC that is always on but appears to be off and responds immediately to user or other re- quests.
Chapter 1: Introduction 1-17 Introduction supply. 1-6 Power Supply As with all computer products, a stable power source is necessary for proper and reliable operation. It is even more important for processors that have high CPU clock rates. The SUPER X5DL8-GG/X5DLR-8G2+/X5DLR-8G2 accommodates ATX power supplies.
S UPER X5DL8-GG/X5DLR-8G2+/X5DLR-8G2 User’s Manual 1-18 Introduction complete modem control capability and a processor interrupt system. Each UART includes a 16-byte send/receive FIFO, a programmable baud rate generator, complete modem control capability and a processor inter- rupt system.
Chapter 2: Installation 2-1 Chapter 2 Installation 2- 1 Static-Sensitive Devices Electric-Static-Discharge (ESD) can damage electronic components. To pre- vent damage to your system board, it is important to handle it very carefully. The following measures are generally sufficient to protect your equipment from ESD.
2-2 S UPER X5DL8-GG/X5DLR-8G2+/X5DLR-8G2 User’s Manual IMPORTANT: Always connect the power cord last and always remove it before adding, removing or changing any hardware components. Make sure that you install the processor into the CPU socket before you install the CPU heat sink.
Chapter 2: Installation 2-3 5. Lift the lever on the CPU socket: lift the the lever completely or you will damage the CPU socket when power is applied . (Install CPU1 first.) Socket lever 6. Install the CPU in the socket. Make sure that pin 1 of the CPU is seated on pin 1 of the socket (both corners are marked with a triangle).
2-4 S UPER X5DL8-GG/X5DLR-8G2+/X5DLR-8G2 User’s Manual Figure 2-1. PGA604 Socket: Empty and with Processor Installed Mounting the Motherboard in the Chassis All motherboards have standard mounting holes to fit different types of chassis. Make sure the location of all the mounting holes for both the motherboard and the chassis match.
Chapter 2: Installation 2-5 2-3 Installing DIMMs Note: Check the Supermicro web site for recommended memory modules: http://www.supermicro.com/TECHSUPPORT/FAQs/Memory_vendors.htm CAUTION Exercise extreme care when installing or removing DIMM modules to prevent any possible damage.
2-6 S UPER X5DL8-GG/X5DLR-8G2+/X5DLR-8G2 User’s Manual Mouse (Green) Keyboard (Purple) USB Ports Parallel Port (Burgundy) COM1 Port (Turquoise) VGA (Monitor) Port (Blue) LAN1 LAN2 Note: COM2 is a header on the motherboard (see motherboard layout for loca- tion).
Chapter 2: Installation 2-7 Front Control Panel JF1 contains header pins for various front control panel connectors. These connectors are designed for use with Supermicro server chassis. See Figure 2-4 for the pin locations of the various front control panel buttons and LED indicators.
2-8 S UPER X5DL8-GG/X5DLR-8G2+/X5DLR-8G2 User’s Manual Power LED The Power LED connection is lo- cated on pins 15 and 16 of JF1. Refer to the table on the right for pin definitions.
Chapter 2: Installation 2-9 Overheat LED (OH) Connect an LED to the OH connec- tion on pins 7 and 8 of JF1 to pro- vide advanced warning of chassis overheating. Refer to the table on the right for pin definitions. NIC1 LED The NIC1 (LAN1) LED connection is located on pins 11 and 12 of JF1.
2-10 S UPER X5DL8-GG/X5DLR-8G2+/X5DLR-8G2 User’s Manual PWR_ON The PWR_ON connection is lo- cated on pins 1 and 2 of JF1. Mo- mentarily contacting both pins will power on/off the system. This button can also be configured to function as a suspend button (see the Power Button Mode setting in BIOS).
Chapter 2: Installation 2-11 PS/2 Keyboard and Mouse Ports The ATX PS/2 keyboard and the PS/2 mouse are located on J11. See the table on the right for pin definitions.
2-12 S UPER X5DL8-GG/X5DLR-8G2+/X5DLR-8G2 User’s Manual HD LED Indicator (JF2) The HD LED connector located at JF2 is used to indicate activity on any hard drive (IDE, SCSI or CD- ROM). Speaker (X5DL8-GG) A speaker header/jumper is lo- cated on JF2.
Chapter 2: Installation 2-13 SMB A System Management Bus header is located at J21. Connect the appropriate cable here to uti- lize SMB on your system. Chassis Intrusion A Chassis Intrusion header is lo- cated at JP57. Attach the correct connector here to inform you of a chassis intrusion condition.
2-14 S UPER X5DL8-GG/X5DLR-8G2+/X5DLR-8G2 User’s Manual LED Colo r Of f Yello w De finitio n No t A cti ve Acti ve Gb LAN Lef t LED Ind i ca to r 2-6 Onboard Indicators GLAN1/GLAN2 LEDs Each of the Ethernet ports (located beside the VGA port) has a yellow and a green LED.
Chapter 2: Installation 2-15 2-7 DIP Switch Settings DIP Switch 4: Processor Speed The red "DIP" switch labeled SW4 has four individual switches, which are used to set the speed of the processor. The table on the right shows you the switch settings for the various speeds your processor may be able to run at.
2-16 S UPER X5DL8-GG/X5DLR-8G2+/X5DLR-8G2 User’s Manual SpeakerEnable/Disable (X5DL8-GG) To enable use of the onboard speaker, put a jumper on pins 13 and 15 of JF2.
Chapter 2: Installation 2-17 Chassis/Overheat Fan Select JP48 allows you to select to use ei- ther the chassis fan or the overheat fan. The default position is closed to select the chassis fan.
2-18 S UPER X5DL8-GG/X5DLR-8G2+/X5DLR-8G2 User’s Manual GLAN1 Enable/Disable (X5DL8-GG) Change the setting of jumper JP54 to enable or disable the onboard LAN1 port on the motherboard. See the table on the right for jumper settings. The default set- ting is pins 1-2.
Chapter 2: Installation 2-19 33 MHz PCI Enable/Disable (X5DL8-GG) If you wish to use 33 MHz PCI cards, close J29 to force the P1 bus (slots 2 & 3) to run at 33 MHz. See the table on the right for jumper settings. Note : if you force the slots(s) to 33 MHz, you must set the P1 bus speed jumpers (above) to the low- est speed.
2-20 S UPER X5DL8-GG/X5DLR-8G2+/X5DLR-8G2 User’s Manual Front Side Bus Speed JP12 is used to set the system (front side) bus speed for the pro- cessors.
Chapter 2: Installation 2-21 2 - 9 Parallel Port, Floppy/Hard Disk Drive and SCSI Connections Note the following when connecting the floppy and hard disk drive cables: • The floppy disk drive cable has seven twisted wires. • A red mark on a wire typically designates the location of pin 1.
2-22 S UPER X5DL8-GG/X5DLR-8G2+/X5DLR-8G2 User’s Manual IDE Connectors There are no jumpers to configure the onboard IDE#1 and #2 connectors (J18 and J19, respectively). See the table on the right for pin definitions. Floppy Connector The floppy connector is located on J12.
Chapter 2: Installation 2-23 Signal Na mes +DB(12) +DB(13) +DB(14) +DB(15) +DB(P1) +DB(0) +DB(1) +DB(2) +DB(3) +DB(4) +DB(5) +DB(6) +DB(7) +DB(P) GROUND DI FFSENS TERMPW R TERMPW R RESERVED GROUND +AT.
2-24 S UPER X5DL8-GG/X5DLR-8G2+/X5DLR-8G2 User’s Manual 2-10 Installing Software Drivers After all the hardware has been installed you must install the software drivers. The necessary drivers are all included on the Supermicro CD that came packaged with your motherboard.
3-1 Chapter 3: Troubleshooting Chapter 3 Troubleshooting 3- 1 Troubleshooting Procedures Use the following procedures to troubleshoot your system. If you have followed all of the procedures below and still need assistance, refer to the ‘Technical Support Procedures’ and/or ‘Returning Merchandise for Service’ section(s) in this chapter.
3-2 S UPER X5DL8-GG/X5DLR-8G2+/X5DLR-8G2 User’s Manual Losing the System’s Setup Configuration 1. Ensure that you are using a high quality power supply. A poor quality power supply may cause the system to lose the CMOS setup informa- tion. Refer to Section 1-6 for details on recommended power supplies.
3-3 Chapter 3: Troubleshooting tacting Technical Support. 2. BIOS upgrades can be downloaded from our web site at http://www.supermicro.com/TECHSUPPORT/BIOS/bios.htm. Note: Not all BIOS can be flashed depending on the modifications to the boot block code.
3-4 S UPER X5DL8-GG/X5DLR-8G2+/X5DLR-8G2 User’s Manual find the readme.txt (flash instructions), the flash.bat (BIOS flash utility) and the BIOS image (xxxxxx.rom) files. Copy these files onto a bootable floppy and reboot your system. It is not necessary to set BIOS boot block protec- tion jumpers on the motherboard.
3-5 Chapter 3: Troubleshooting BIOS is not in control such as during memory count (the first screen that appears when the system is turned on), the momentary on/off switch must be held for more than four seconds to shut down the system. This feature is required to implement the ACPI features on the motherboard.
3-6 S UPER X5DL8-GG/X5DLR-8G2+/X5DLR-8G2 User’s Manual Notes.
Chapter 4: AMIBIOS 4-1 Chapter 4 AMIBIOS 4-1 Introduction This chapter describes the AMIBIOS for the X5DL8-GG/X5DLR-8G2+/X5DLR- 8G2. The AMI ROM BIOS is stored in a Flash EEPROM and can be easily upgraded using a floppy disk-based program.
4-2 S UPER X5DL8-GG/X5DLR-8G2+/X5DLR-8G2 User’s Manual 4- 2 BIOS Features • Supports Plug and Play V1.0A and DMI 2.3 • Supports Intel PCI (Peripheral Component Interconnect) (PME) local bus specification 2.2 • Supports Advanced Power Management (APM) specification v 1.
Chapter 4: AMIBIOS 4-3 Use the Up/Down arrow keys or the <Tab> key to move between the different settings in the above menu. When the items "System Time", and "System Date" are highlighted, type in the correct time/date in the time field, and then press "Enter".
4-4 S UPER X5DL8-GG/X5DLR-8G2+/X5DLR-8G2 User’s Manual Use the Up/Down arrow keys to select the "Super I/O Configuration line. When the "Super IO Configuration" line is highlighted, hit "ENTER" to display its menu. The following Super IO Configuration screen will appear.
Chapter 4: AMIBIOS 4-5 Super IO Configuration The Super IO Configuration includes the following items: Serial Port 1 Address This option specifies the base I/O port address of serial port 1. The set- tings for this item include Disabled, 3F8 and 3E8 and 2E8.
4-6 S UPER X5DL8-GG/X5DLR-8G2+/X5DLR-8G2 User’s Manual Serial Port 2 Mode Use this option to choose the Serial Port 2 Mode. The settings are Normal , Sharp-IR, SIR and consumer. Parallel Port Address This option specifies the I/O address used by the parallel port.
Chapter 4: AMIBIOS 4-7 Primary IDE Master When entering "Setup", BIOS automatically detects the presence of IDE devices. This displays the auto detection status of the IDE de- vices. You can also manually configure the IDE drives by providing the following information: This option allows the user to configure the IDE devices.
4-8 S UPER X5DL8-GG/X5DLR-8G2+/X5DLR-8G2 User’s Manual PIO Mode IDE PIO (Programmable I/O) mode programs timing cycles between the IDE drive and the programmable IDE controller. As the PIO mode in- creases, the cycle time decreases. The settings are: Auto , 0, 1, 2, 3 and 4.
Chapter 4: AMIBIOS 4-9 Primary IDE Slave When the system enters "Setup", BIOS automatically detects the presence of IDE devices. This option displays the auto detection status of IDE de- vices. The settings for "Primary IDE Slave" are the same as those for the "Primary IDE Master".
4-10 S UPER X5DL8-GG/X5DLR-8G2+/X5DLR-8G2 User’s Manual Floppy Configuration Floppy A Use this option to specify which of floppy drive you have installed in the A drive. The settings are Disabled, 360 KB 5 1/4", 1.2 MB 5 1/4", 720 KB 3 1/ 2", 1.
Chapter 4: AMIBIOS 4-11 BootUp Num Lock This option is used to select the status of the Number Lock function on your keyboard on bootup. The settings are On and Off. BootUp CPU Speed This option is used set the CPU speed to either High or Low. PS/2 Mouse Support This option specifies whether a PS/2 Mouse will be supported.
4-12 S UPER X5DL8-GG/X5DLR-8G2+/X5DLR-8G2 User’s Manual Wait for F1 if Error This settings for this option are Enabled and Disabled. Disabled: This prevents the AMIBIOS to wait on an error for user intervention. This setting should be used if there is a known reason for a BIOS error to appear.
Chapter 4: AMIBIOS 4-13 Event Log Configuration Event Logging This option Enables or Disables the logging of events. You can use this screen to select options for the Event Log Configuration Settings. You can access sub screens to view the event log and mark all events as read.
4-14 S UPER X5DL8-GG/X5DLR-8G2+/X5DLR-8G2 User’s Manual Peripheral Device Configuration Power Lost Control This option determines how the system will respond when power is reap- plied after a power loss condition. Choose Always On to automatically start up the system when power is reapplied.
Chapter 4: AMIBIOS 4-15 4- 5 Chipset Setup Choose Chipset Setup from the AMIBIOS Setup Utility main menu. The screen is shown below. All Chipset Setup options are described following the screen. BIOS SE TUP UTILITY Main Advanced Chi pset PCIPnP Power Boot Security Exit Memory Timing Cont rol [Auto] SDRAM CAS Latency [CAS Laten cy 2.
4-16 S UPER X5DL8-GG/X5DLR-8G2+/X5DLR-8G2 User’s Manual 4-6 PCI PnP Setup Choose PCI/PnP Setup from the AMIBIOS Setup main menu. All PCI/PnP options are described in this section. The PCI/PnP Setup screen is shown below. Hyper-threading Enables hyper-threading if supported by the operating system.
Chapter 4: AMIBIOS 4-17 Plug & Play OS This option specifies how Plug and Play devices will be configured. The settins are Yes and No . No lets BIOS configure all devices in the system. Yes lets the operating system (if supported) configure PnP devices not required for bootup.
4-18 S UPER X5DL8-GG/X5DLR-8G2+/X5DLR-8G2 User’s Manual 4-7 Power Setup Choose Power Setup from the AMIBIOS Setup main menu. All Power Setup options are described in this section.
Chapter 4: AMIBIOS 4-19 Power Button Mode This option allows you to change the function of the chassis power button. The settings are On/Off and Suspend. When set to Suspend, depressing the power button when the system is up will cause it to enter a suspend state.
4-20 S UPER X5DL8-GG/X5DLR-8G2+/X5DLR-8G2 User’s Manual 4-8 Boot Setup Choose Boot Setup from the AMIBIOS Setup main menu. All Boot Setup options are described in this section.
Chapter 4: AMIBIOS 4-21 3rd Boot Device The settings for the 3rd Boot Device are Removable Device, ATAPI CDROM, Hard Drive , Onboard LAN2 Option-ROM and IBA 4.0.1.9 Slot 0102. 4th Boot Device The settings for the 4th Boot Device are Removable Device, ATAPI CDROM, Hard Drive, Onboard LAN2 Option-ROM and IBA 4.
4-22 S UPER X5DL8-GG/X5DLR-8G2+/X5DLR-8G2 User’s Manual 4-9 Security Setup Choose Security Setup from the AMIBIOS Setup main menu. All Security Setup options are described in this section. The Security Setup screen is shown below. Supervisor Password User Password AMIBIOS provides both Supervisor and User password functions.
Chapter 4: AMIBIOS 4-23 Change Supervisor Password This option allows you to change a supervisor password that was entered previously. Change User Password This option allows you to change a user password that was entered previ- ously.
4-24 S UPER X5DL8-GG/X5DLR-8G2+/X5DLR-8G2 User’s Manual 4-10 Exit Setup Choose Exit Setup from the AMIBIOS Setup main menu. All Exit Setup op- tions are described in this section.
Chapter 4: AMIBIOS 4-25 Load Optimal Defaults Highlighting this setting and then pressing <Enter> provides the optimum performance settings for all devices and system features. Load Failsafe Defaults Highlighting this setting and then pressing <Enter> provides the safest set of parameters for the system.
4-26 S UPER X5DL8-GG/X5DLR-8G2+/X5DLR-8G2 User’s Manual Notes.
Appendix A BIOS Error Beep Codes During the POST (Power-On Self-Test) routines, which are performed each time the system is powered on, errors may occur. Non-fatal errors are those which, in most cases, allow the system to continue the boot-up process.
A-2 S UPER X5DL8-GG/X5DLR-8G2+/X5DLR-8G2 User’s Manual Notes.
B-1 Appendix B: BIOS POST Checkpoint Codes Appendix B BIOS POST Checkpoint Codes When AMIBIOS performs the Power On Self Test, it writes checkpoint codes to I/O port 0080h. If the computer cannot complete the boot process, diagnostic equipment can be attached to the computer to read I/O port 0080h.
B-2 S UPER X5DL8-GG/X5DLR-8G2+/X5DLR-8G2 User’s Manual B- 2 Bootblock Recovery Codes The bootblock recovery checkpoint codes are listed in order of execution: Checkpoint Code Description E 0 h The onboard floppy controller if available is initialized.
B-3 Appendix B: BIOS POST Checkpoint Codes initialization before the keyboard BAT command is issued. 0C h The keyboard controller input buffer is free. Next, issuing the BAT command to the keyboard controller. 0 E h The keyboard controller BAT command result has been verified.
B-4 S UPER X5DL8-GG/X5DLR-8G2+/X5DLR-8G2 User’s Manual Checkpoint Code Description 25h Interrupt vector initialization is done. Clearing the password if the POST DIAG switch is on. 27h Any initialization before setting video mode will be done next. 28h Initialization before setting the video mode is complete.
B-5 Appendix B: BIOS POST Checkpoint Codes Checkpoint Code Description 48h Patterns written in base memory. Determining the amount of memory below 1 MB next. 49h The amount of memory below 1 MB has been found and verified. Determining the amount of memory above 1 MB memory next.
B-6 S UPER X5DL8-GG/X5DLR-8G2+/X5DLR-8G2 User’s Manual Checkpoint Code Description 60h The DMA page register test passed. Performing the DMA Controller 1 base register test next. 62h The DMA controller 1 base register test passed. Performing the DMA controller 2 base register test next.
B-7 Appendix B: BIOS POST Checkpoint Codes Checkpoint Code Description 95h Initializing the bus option ROMs from C800 next. See the last page of this chapter for additional information. 96h Initializing before passing control to the adaptor ROM at C800.
B-8 S UPER X5DL8-GG/X5DLR-8G2+/X5DLR-8G2 User’s Manual Notes.
Un punto importante, dopo l’acquisto del dispositivo (o anche prima di acquisto) è quello di leggere il manuale. Dobbiamo farlo per diversi motivi semplici:
Se non hai ancora comprato il SUPER MICRO Computer SUPER X5DLR-8G2 è un buon momento per familiarizzare con i dati di base del prodotto. Prime consultare le pagine iniziali del manuale d’uso, che si trova al di sopra. Dovresti trovare lì i dati tecnici più importanti del SUPER MICRO Computer SUPER X5DLR-8G2 - in questo modo è possibile verificare se l’apparecchio soddisfa le tue esigenze. Esplorando le pagine segenti del manuali d’uso SUPER MICRO Computer SUPER X5DLR-8G2 imparerai tutte le caratteristiche del prodotto e le informazioni sul suo funzionamento. Le informazioni sul SUPER MICRO Computer SUPER X5DLR-8G2 ti aiuteranno sicuramente a prendere una decisione relativa all’acquisto.
In una situazione in cui hai già il SUPER MICRO Computer SUPER X5DLR-8G2, ma non hai ancora letto il manuale d’uso, dovresti farlo per le ragioni sopra descritte. Saprai quindi se hai correttamente usato le funzioni disponibili, e se hai commesso errori che possono ridurre la durata di vita del SUPER MICRO Computer SUPER X5DLR-8G2.
Tuttavia, uno dei ruoli più importanti per l’utente svolti dal manuale d’uso è quello di aiutare a risolvere i problemi con il SUPER MICRO Computer SUPER X5DLR-8G2. Quasi sempre, ci troverai Troubleshooting, cioè i guasti più frequenti e malfunzionamenti del dispositivo SUPER MICRO Computer SUPER X5DLR-8G2 insieme con le istruzioni su come risolverli. Anche se non si riesci a risolvere il problema, il manuale d’uso ti mostrerà il percorso di ulteriori procedimenti – il contatto con il centro servizio clienti o il servizio più vicino.
