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324632-003 Revision: 2.1 January 2011 Intel ® 82575EB Gigabit Ethernet Controller Software Developer’s Manual and EEPROM Guide LAN Access Division.
Intel ® 82575EB Gigabit Ethernet Controller — Legal Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 2 January 2011 Legal INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS.
Revisions — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 3 Revisions Revision Date Description .25 2/2006 Initial release (Intel Secret).
Intel ® 82575EB Gigabit Ethernet Controller — Content Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 4 January 2011 Content 1.0 Introduction .....................................
Content — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 5 4.2 Flash Interface Operation ................................
Intel ® 82575EB Gigabit Ethernet Controller — Content Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 6 January 2011 4.6.1.4 SMBus Slave Addresses - (0ffset 03h)..................
Content — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 7 4.6.7.30 LAN0 IPv6 Address 0 LSB; MIPAF (Offset 47h) .........
Intel ® 82575EB Gigabit Ethernet Controller — Content Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 8 January 2011 5.5 Header Splitting and Replication .........................
Content — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 9 5.13.8 Extended Interrupt Mask Set and Read Register (EIMS)/Extended Interrupt Mask Clear Register (EIMC) 164 5.
Intel ® 82575EB Gigabit Ethernet Controller — Content Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 10 January 2011 6.6.5.3.2 Advanced Error Reporting Capability ...............
Content — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 11 9.0 Ethernet Interface ......................................
Intel ® 82575EB Gigabit Ethernet Controller — Content Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 12 January 2011 11.3 Link Criteria ..........................................
Content — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 13 14.1.1 Memory and I/O Address Decoding ......................
Intel ® 82575EB Gigabit Ethernet Controller — Content Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 14 January 2011 14.3.26 Manageability Flash Control Register - FLMNGCTL (1018h; R/W) .
Content — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 15 14.4.2 Tx DCA Control Registers - TXCTL (03814h + 100h *n [n=0.
Intel ® 82575EB Gigabit Ethernet Controller — Content Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 16 January 2011 14.8.23 MSI-X PBA Clear - PBACL (05B68h; R/W1C)..............
Content — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 17 14.9.57 SerDes/SGMII Code Violation Packet Count - SCVPC (04228h; R/WS) .
Intel ® 82575EB Gigabit Ethernet Controller — Content Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
Introduction — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 19 1.0 Introduction This document describes the external architecture (including device operation, register definitions, etc.
Intel ® 82575EB Gigabit Ethernet Controller — Memory Alignment Terminology Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 20 January 2011 • PCI Express* Card Electromechanical Specification, Rev 1.
Architectural Overview — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 21 2.0 Architectural Overview This section provides an overview of the 82575 .
Intel ® 82575EB Gigabit Ethernet Controller — Integrated 10/100/1000 Mb/s PHY Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 22 January 2011 Figure 1. 82575 External Interfaces 2.
Flash Memory Interface — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 23 2.1.4 Flash Memory Interface The 82575 provides an external serial interface to a FLASH device.
Intel ® 82575EB Gigabit Ethernet Controller — LEDs Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 24 January 2011 the four pins is configurable via EEPROM as well as the default value of any pins configured as outputs.
Ethernet Addressing — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 25 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e Example 1.
Intel ® 82575EB Gigabit Ethernet Controller — Interrupt Control and Tuning Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 26 January 2011 Table 2. Intel® Architecture Byte Ordering Note: The notation in this manual follows the convention shown in Table 2 .
Jumbo Frame Support — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 27 2.5.1 Jumbo Frame Support The 82575 supports jumbo frames to increase performance and decrease CPU utilization.
Intel ® 82575EB Gigabit Ethernet Controller — Multiple Transmit Queues Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 28 January 2011 The software gives the hardware ownership of a queue of buffers for receives.
General Initialization and Reset Operation — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.
Intel ® 82575EB Gigabit Ethernet Controller — Global Reset and General Configuration Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 30 January 2011 After the initialization completes, a typical driver enables the desired interrupts by writing to the IMS and EIMS registers.
Initialize the Receive Control Register — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 31 • Enable the queue by setting RXDCTL.
Intel ® 82575EB Gigabit Ethernet Controller — Dynamic Queue Enabling and Disabling Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 32 January 2011 • Set the length register to the size of the descriptor ring.
MAC/PHY Link Setup (CTRL_EXT.LINK_MODE = 00b) — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.
Intel ® 82575EB Gigabit Ethernet Controller — MAC/SerDes Link Setup (CTRL_EXT.LINK_MODE = 11b) Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 34 January 2011 STATUS.FD - Reflects the MAC duplex setting written by software to CTRL.
MAC/SGMII Link Setup (CTRL_EXT.LINK_MODE = 10b) — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 35 STATUS.FD - Reflects the value written by software to CTRL.
Intel ® 82575EB Gigabit Ethernet Controller — MAC/SGMII Link Setup (CTRL_EXT.LINK_MODE = 10b) Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 36 January 2011 • Hardware Auto-Negotiation Enabled (PCS_LCTL.
Reset Operation — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 37 PCS_LCTL.FDV - Should be set by software to the duplex value established via software priority resolution PCS_LCTL.
Intel ® 82575EB Gigabit Ethernet Controller — Reset Operation Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 38 January 2011 D3hot to D0 Transition: This is also known as ACPI Reset.
Reset Operation — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 39 Table 3.
Intel ® 82575EB Gigabit Ethernet Controller — Reset Operation Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 40 January 2011 a. SDP0_IODIR, SDP1_IODIR, SDP2_IODIR, SDP3_IODIR - reset on Internal_Power_On_Reset only.
PHY Behavior During a Manageability Session: — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 41 b. IP Address Valid. c. IPv4 Address Table d.
Intel ® 82575EB Gigabit Ethernet Controller — Initialization of Statistics Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 42 January 2011 The Keep_PHY_Link_Up bit is set by the BMC through a command on the sideband interface.
EEPROM and Flash Interface — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 43 4.0 EEPROM and Flash Interface This section describes the EEPROM and Flash interfaces supported by 82575.
Intel ® 82575EB Gigabit Ethernet Controller — Signature and CRC Fields Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 44 January 2011 Software can use the EEPROM Read register (EERD) to cause the 82575 to read a word from the EEPROM that the software can then use.
Protected EEPROM Space — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 201.
Intel ® 82575EB Gigabit Ethernet Controller — Activating the Protection Mechanism Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 46 January 2011 sequence, the 82575 reads the hardware initialization words in the EEPROM.
EEPROM-Less Support — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 47 s32 is signed 32 bit value, u8 is unsigned 8 bit value.
Intel ® 82575EB Gigabit Ethernet Controller — EEPROM-Less Support Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
Flash Interface Operation — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January .
Intel ® 82575EB Gigabit Ethernet Controller — Flash Write Control Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 50 January 2011 To directly access the Flash, software needs to: 1.
EEPROM Map Shared Words — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 51 • Hardware auto read. • Accesses of port 0 LAN driver.
Intel ® 82575EB Gigabit Ethernet Controller — Flash Access Contention Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
EEPROM Map — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 53 09h SW .
Intel ® 82575EB Gigabit Ethernet Controller — Hardware Accessed Words Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 54 January 2011 4.5.1 Hardware Accessed Words This section describes the EEPROM words that are loaded by the 82575 hardware.
Hardware Accessed Words — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 55 Table 5.
Intel ® 82575EB Gigabit Ethernet Controller — Hardware Accessed Words Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
Hardware Accessed Words — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 57 4.
Intel ® 82575EB Gigabit Ethernet Controller — Hardware Accessed Words Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 58 January 2011 • Set defaults for some internal registers.
Hardware Accessed Words — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 59 4.5.1.8 Software Defined Pins Control (Word 10h) This word configures initial settings for the Software Definable Pins.
Intel ® 82575EB Gigabit Ethernet Controller — Hardware Accessed Words Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
Hardware Accessed Words — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 61 4.5.1.10 Initialization Control 3 (Word 14h, 24h) This word controls general initialization values.
Intel ® 82575EB Gigabit Ethernet Controller — Hardware Accessed Words Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
Hardware Accessed Words — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 63 The description of bits 13 and 11 in various combinations are as follows: 4.
Intel ® 82575EB Gigabit Ethernet Controller — Hardware Accessed Words Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 64 January 2011 4.5.1.12 MSI-X Configuration (Word 16h) 4.5.1.
Hardware Accessed Words — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 65 4.5.1.16 Software Defined Pins Control (Word 20h) This configures initial settings for the Software Definable Pins.
Intel ® 82575EB Gigabit Ethernet Controller — Hardware Accessed Words Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 66 January 2011 4.5.1.17 PCIe* Initialization Configuration 3 (Word 1Ah) This word sets default values for some internal registers.
Hardware Accessed Words — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 67 Table 16.
Intel ® 82575EB Gigabit Ethernet Controller — Hardware Accessed Words Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 68 January 2011 4.5.1.18 PCIe* Control (Word 1Bh) This word configures initial settings for the PCIe* default functionality.
Hardware Accessed Words — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 69 4.
Intel ® 82575EB Gigabit Ethernet Controller — Hardware Accessed Words Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 70 January 2011 Table 19. LED Mode 4.5.1.20 Device Revision ID (Word 1Eh) 4.
Hardware Accessed Words — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 20.
Intel ® 82575EB Gigabit Ethernet Controller — Hardware Accessed Words Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
Hardware Accessed Words — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 73 6 CRC_DIS PHY / SERDES / PCIe* CRC disable. 0b = Enable.
Intel ® 82575EB Gigabit Ethernet Controller — Hardware Accessed Words Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 74 January 2011 4.5.1.25 End of RO Area (Word 2Ch 4.5.1.26 Start of RO Area (Word 2Dh) 4.
Hardware Accessed Words — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 75 The main setup options are stored in word 30h.
Intel ® 82575EB Gigabit Ethernet Controller — Hardware Accessed Words Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
Hardware Accessed Words — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 77 4.5.1.29.3 PXE Version (Word 32h) Word 32h of the EEPROM is used to store the version of the boot agent that is stored in the flash image.
Intel ® 82575EB Gigabit Ethernet Controller — Hardware Accessed Words Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 78 January 2011 4.5.1.29.6 Configuration Customization Options PCI Function 1 (Word 35h) This word is the same as word 31h, but for function 1 of the device.
Hardware Accessed Words — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 79 Reserved 34 Reserved for future use. BELOW FIELDS ARE PER PORT.
Intel ® 82575EB Gigabit Ethernet Controller — Hardware Accessed Words Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
Manageability Control Sections — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 81 4.6 Manageability Control Sections 4.6.
Intel ® 82575EB Gigabit Ethernet Controller — Sideband Configuration Structure Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 82 January 2011 15:9 SMBus 1 Slave Address Dual-address mode only.
Flex TCO Filter Configuration Structure — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 83 4.6.1.5 SMBus Fail-Over Register (Low Word) - (0ffset 04h) 4.
Intel ® 82575EB Gigabit Ethernet Controller — Flex TCO Filter Configuration Structure Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
NC-SI Microcode Download Structure — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 85 4.6.2.2 Flex Filter Length and Control - (0ffset 01h) 4.
Intel ® 82575EB Gigabit Ethernet Controller — NC-SI Configuration Structure Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 86 January 2011 4.6.4 NC-SI Configuration Structure 4.6.
Common Firmware Pointer — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 87 4.6.4.5 Tx Mode Control2 (RT_CTRL[31:16]) (Offset 04h) 4.
Intel ® 82575EB Gigabit Ethernet Controller — Pass Through Pointers Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 88 January 2011 4.6.5.1 Manageability Capability/Manageability Enable (Word 54h) 4.
Pass Through Pointers — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 89 15:0 Pointer Pointer to the flex TCO configuration pointer structure.
Intel ® 82575EB Gigabit Ethernet Controller — PT LAN Configuration Structure Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 90 January 2011 4.6.6.4 PT LAN1 Configuration Pointer (Word 59h) 4.
PT LAN Configuration Structure — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 91 Same structure as LAN0 IPv4 Address 0.
Intel ® 82575EB Gigabit Ethernet Controller — PT LAN Configuration Structure Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 92 January 2011 4.6.7.13 LAN0 UDP Flex Filter Ports 0:15; MFUTP Registers (Offset 15h:24h) 4.
PT LAN Configuration Structure — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 93 4.6.7.17 LAN0 MAC Value MSB (Offset 2Fh) 4.
Intel ® 82575EB Gigabit Ethernet Controller — PT LAN Configuration Structure Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 94 January 2011 7:0 Receive Enable Byte 13 Interface value.
PT LAN Configuration Structure — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 95 4.6.7.21 LAN0 MANC2H Value LSB (Offset 33h) 4.
Intel ® 82575EB Gigabit Ethernet Controller — PT LAN Configuration Structure Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 96 January 2011 4.6.7.24 Manageability Decision Filters; MDEF0, 2 (Offset 36h) 4.
PT LAN Configuration Structure — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 97 4.6.7.26 ARP Response IPv4 Address 0 LSB (Offset 43h) 4.
Intel ® 82575EB Gigabit Ethernet Controller — Software Owned EEPROM Words Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 98 January 2011 4.6.7.32 LAN0 IPv6 Address 0 LSB; MIPAF (Offset 49h) 4.
Compatibility Fields (Word 03h:07h) — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 99 4.7.1 Compatibility Fields (Word 03h:07h) Five words in the EEPROM image are reserved for compatibility information.
Intel ® 82575EB Gigabit Ethernet Controller — PBA Number (Words 08h, 09h) Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
Receive and Transmit Description — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 101 5.
Intel ® 82575EB Gigabit Ethernet Controller — Receive Data Flow Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
Packet Address Filtering — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 103 5.3.1 Packet Address Filtering Hardware stores incoming packets in host memory subject to the following filter modes.
Intel ® 82575EB Gigabit Ethernet Controller — Legacy Receive Descriptor Format Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 104 January 2011 If for any queue SRRCTL[n].BSIZEPACKET equals 0b, the buffer size defined by RCTL.
Legacy Receive Descriptor Format — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 105 For packets with a VLAN header, the packet checksum includes the header (if VLAN striping is not enabled by the CTRL.
Intel ® 82575EB Gigabit Ethernet Controller — Legacy Receive Descriptor Format Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
Legacy Receive Descriptor Format — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 107 5.3.3.4 Receive Descriptor Errors Field Most error information appears only when the Store Bad Packets bit (RCTL.
Intel ® 82575EB Gigabit Ethernet Controller — Legacy Receive Descriptor Format Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
Advanced Receive Descriptors — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 109 If receive checksum offloading is disabled (RXCSUM.
Intel ® 82575EB Gigabit Ethernet Controller — Advanced Receive Descriptors Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
Advanced Receive Descriptors — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 111 5.
Intel ® 82575EB Gigabit Ethernet Controller — Advanced Receive Descriptors Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 112 January 2011 Table 31. Supported Packets Note: The header of the fragmented IPv6 packet is defined until the fragmented extension header.
Advanced Receive Descriptors — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 113 This field is mutually exclusive with the RSS Hash Value.
Intel ® 82575EB Gigabit Ethernet Controller — Advanced Receive Descriptors Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 114 January 2011 Note: Unsupported packet types will either have the IXSM bit set, or do not have the IPCS or TCPCS bits set.
Advanced Receive Descriptors — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 115 5.
Intel ® 82575EB Gigabit Ethernet Controller — Receive UDP Fragmentation Checksum Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 116 January 2011 5.3.4.11 VLAN Tag Field Hardware stores additional information in the receive descriptor for 802.
Receive Descriptor Write-Back — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide Janu.
Intel ® 82575EB Gigabit Ethernet Controller — Receive Descriptor Ring Structure Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
Multiple Receive Queues — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 119 These registers hold a value that is an offset from the base and indicates the in-progress descriptor.
Intel ® 82575EB Gigabit Ethernet Controller — Queuing for Virtual Machine Devices (VMDq) Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 120 January 2011 When receiving an incoming packet, its header is analyzed, according to the protocol used (IPv4, IPv6, etc.
Queuing for Virtual Machine Devices (VMDq) — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 121 Software can program different values to the MAC filters (any bits in RAH or RAL) at any time.
Intel ® 82575EB Gigabit Ethernet Controller — Multiple Receive Queues & Receive-Side Scaling (RSS) Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
Multiple Receive Queues & Receive-Side Scaling (RSS) — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 123 • IPv6Ex.
Intel ® 82575EB Gigabit Ethernet Controller — Multiple Receive Queues & Receive-Side Scaling (RSS) Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
Multiple Receive Queues & Receive-Side Scaling (RSS) — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.
Intel ® 82575EB Gigabit Ethernet Controller — RSS Verification Suite Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
Header Splitting and Replication — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 127 5.
Intel ® 82575EB Gigabit Ethernet Controller — Header Splitting and Replication Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 128 January 2011 The Header Buffer Address includes the address of the buffer that contains the header information.
Header Splitting and Replication — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 129 Table 33. Header Splitting and Header Replication Mode Note: If SRRCTL#.
Intel ® 82575EB Gigabit Ethernet Controller — Receive Packet Checksum Offloading Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
Receive Packet Checksum Offloading — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 131 Table 34 lists the general details about what packets are processed.
Intel ® 82575EB Gigabit Ethernet Controller — Receive Packet Checksum Offloading Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
Packet Transmission — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 133 Table 35. Next Header Type Encodings Note: The 82575 hardware acceleration does not support all IPv6 Extension header types.
Intel ® 82575EB Gigabit Ethernet Controller — Transmit Data Storage Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 134 January 2011 Output packets are made up of pointer–length pairs constituting a descriptor chain (so called descriptor based transmission).
Transmit Descriptors — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 135 Each context defines information about the packet sent including the total size of the MAC header (TDESC.
Intel ® 82575EB Gigabit Ethernet Controller — Transmit Descriptor Write Back Format Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 136 January 2011 Table 36. Transmit Descriptor (TDESC) Layout – Legacy Mode 5.
Transmit Descriptor Write Back Format — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.
Intel ® 82575EB Gigabit Ethernet Controller — Transmit Descriptor Write Back Format Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 138 January 2011 Table 37. Transmit Command (TDESC.
Transmit Descriptor Special Field Format — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 139 5.6.5.4 Transmit Descriptor Status Field Format Table 38.
Intel ® 82575EB Gigabit Ethernet Controller — Advanced Transmit Context Descriptor Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 140 January 2011 Table 39. Special Field (TDESC.
Advanced Transmit Context Descriptor — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 141 5.6.7.1 Maximum Segment Size (MSS) Control This field specifies the maximum TCP payload segment sent per frame, less any header.
Intel ® 82575EB Gigabit Ethernet Controller — Advanced Transmit Data Descriptor Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 142 January 2011 Table 42. Advanced Transmit Context Descriptor Required Valid Fields 5.
Advanced Transmit Data Descriptor — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 143 5.6.8.4 DCMD DCMD Layout Field Description TSE TCP Segmentation Enable Indicates a TCP segmentation request.
Intel ® 82575EB Gigabit Ethernet Controller — Transmit Descriptor Ring Structure Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 144 January 2011 5.6.8.5 STA Table 45. STA Layout 5.
Transmit Descriptor Ring Structure — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 145 Descriptors passed to hardware should not be manipulated by software until the head pointer has advanced past them.
Intel ® 82575EB Gigabit Ethernet Controller — Transmit Descriptor Fetching Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 146 January 2011 address = base + (ptr * 16) , where ptr is the value in the hardware head or tail register.
TCP Segmentation — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 147 write-back descriptors. Secondly, to preserve backward compatibility, if the TXDCTL[n].
Intel ® 82575EB Gigabit Ethernet Controller — Assumptions Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 148 January 2011 5.8.1 Assumptions The following assumption applies to the TCP Segmentation implementation in the 82575: The RS bit operation is not changed.
Packet Format — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 149 • The stack does not need to partition the block to fit the MTU size (saves CPU cycles).
Intel ® 82575EB Gigabit Ethernet Controller — TCP Segmentation Indication Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
IP and TCP/UDP Headers — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 201.
Intel ® 82575EB Gigabit Ethernet Controller — IP and TCP/UDP Headers Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 152 January 2011 Figure 11. IPv4 Header (Little-Endian Order) Note: Identification is incremented on each packet.
IP and TCP/UDP Headers — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 153 The TCP header is first shown in the traditional (RFC 793) representation.
Intel ® 82575EB Gigabit Ethernet Controller — IP and TCP/UDP Headers Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
IP and TCP/UDP Headers — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 155 A type 0 routing header contains the following format: Figure 18.
Intel ® 82575EB Gigabit Ethernet Controller — IP/TCP/UDP Header Updating Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 156 January 2011 All checksum calculations use a 16-bit wide one’s complement checksum.
IP/TCP/UDP Header Updating — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 157 5.
Intel ® 82575EB Gigabit Ethernet Controller — IP/TCP/UDP Transmit Checksum Offloading Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
IP/TCP/UDP Transmit Checksum Offloading in Non-Segmentation Mode — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.
Intel ® 82575EB Gigabit Ethernet Controller — TCP Checksum Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 160 January 2011 As mentioned in Section 5.6.2 , it is not necessary to set a new context for each new packet.
Tx Completions Head Write-Back — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 161 • Round robin arbitration is performed among the LP queues.
Intel ® 82575EB Gigabit Ethernet Controller — Interrupts Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
Interrupt Cause Set Register (ICS) — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 163 Note: When EICR is used in MSI-X mode, the Rx / Tx related bits in ICR should be masked.
Intel ® 82575EB Gigabit Ethernet Controller — Extended Interrupt Cause Set Register (EICS) Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
Interrupt Modes Setting Bits — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 165 5.13.11 Interrupt Modes Setting Bits There are bits in the CTRL_EXT register that define the behavior of the interrupt mechanism.
Intel ® 82575EB Gigabit Ethernet Controller — Interrupt Moderation Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
Interrupt Moderation — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 167 Figure 20.
Intel ® 82575EB Gigabit Ethernet Controller — Clearing Interrupt Causes Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 168 January 2011 Figure 21. Case A: Heavy Load, Interrupts Moderated Figure 22.
Write to Clear — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 169 5.
Intel ® 82575EB Gigabit Ethernet Controller — TCP Timer Interrupt Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 170 January 2011 5.16.1 TCP Timer Interrupt In order to implement TCP timers for I/OAT 2, software needs to take action periodically (every 10 milliseconds).
PCIe* Local Bus Interface — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 173 6.
Intel ® 82575EB Gigabit Ethernet Controller — Data Alignment Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 174 January 2011 6.1.3 Data Alignment 6.1.3.1 4 KB Boundary Requests must not specify an address/length combination causing memory space access to cross a 4 KB boundary.
Transaction Attributes — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 175 6.1.4.2 Relaxed Ordering The 82575 takes advantage of the relaxed ordering rules of the PCIe* Specification.
Intel ® 82575EB Gigabit Ethernet Controller — Flow Control Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
Flow Control Update Frequency — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 177 6.2.3 Flow Control Update Frequency In any case, UpdateFC packets are scheduled immediately after a resource is available.
Intel ® 82575EB Gigabit Ethernet Controller — Tag IDs Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
Tag IDs — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 179 Tag ID De.
Intel ® 82575EB Gigabit Ethernet Controller — Tag IDs Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
Completion Timeout Mechanism — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 181 IDs are as in data movement engine 1 mode.
Intel ® 82575EB Gigabit Ethernet Controller — Error Events and Error Reporting Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 182 January 2011 • Version = 2h - Programmed through PCI configuration.
Error Events — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 183 Bad TLP • Bad CRC. • Illegal EDB. • Wrong sequence number.
Intel ® 82575EB Gigabit Ethernet Controller — Error Pollution Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 184 January 2011 6.4.2 Error Pollution Error pollution can occur if error conditions for a given transaction are not isolated to the error’s first occurrence.
Link Layer — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 185 2. Changes in the response to some Uncorrectable Non-Fatal errors detected in non-posted requests to the 82575 called Advisory Non-fatal Error cases.
Intel ® 82575EB Gigabit Ethernet Controller — Transmit EDB Nullifying Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 186 January 2011 The following DLLPs are supported by the 82575 as a transmitter.
Link Width — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 187 The max link width is loaded into the Maximum Link Width field of the PCIe* Capability register (LCAP[11:6]).
Intel ® 82575EB Gigabit Ethernet Controller — Performance Monitoring Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 188 January 2011 6.6.1.5 Reset The PCIe* Physical layer can supply a core reset to the 82575.
Mandatory PCI Configuration Registers — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 189 The LAN0 and LAN1 are shown in PCI functions 0 and PCI functions 1, respectively.
Intel ® 82575EB Gigabit Ethernet Controller — Mandatory PCI Configuration Registers Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 190 January 2011 Note: The following color notation is used for reference: Interpretation of the various 82575 registers is provided as follows.
Mandatory PCI Configuration Registers — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 191 Status Register Shaded bits are not used by this implementation and are hardwired to 0b.
Intel ® 82575EB Gigabit Ethernet Controller — Mandatory PCI Configuration Registers Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 192 January 2011 Revision The default revision ID of this device is 02h.
Mandatory PCI Configuration Registers — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.
Intel ® 82575EB Gigabit Ethernet Controller — Mandatory PCI Configuration Registers Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 194 January 2011 Subsystem ID This value can be loaded automatically from the EEPROM at power up with a default value of 0000h.
PCI Power Management Registers — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide Jan.
Intel ® 82575EB Gigabit Ethernet Controller — PCI Power Management Registers Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 196 January 2011 Power Management Control/Status Register (PMCSR) The PMCSR is 2 bytes at offset 44h and is read/write.
PCI Power Management Registers — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 197 PMCSR_BSE Bridge Support Extensions: 1 Byte, Offset 46h, (RO) This field is 1 byte at offset 46h and is read only.
Intel ® 82575EB Gigabit Ethernet Controller — PCI Power Management Registers Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
PCI Power Management Registers — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide Jan.
Intel ® 82575EB Gigabit Ethernet Controller — PCI Power Management Registers Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 200 January 2011 Table 69. MSI-X Message Control Field Table 70.
PCI Power Management Registers — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 201 Table 71.
Intel ® 82575EB Gigabit Ethernet Controller — PCI Power Management Registers Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 202 January 2011 Note: The following color notation is used for reference: Capability ID The Capability ID is 1 byte at offset A0h and is read only.
PCI Power Management Registers — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 203 Device CAP This field is 4 bytes at offset A4h and is read only.
Intel ® 82575EB Gigabit Ethernet Controller — PCI Power Management Registers Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 204 January 2011 Device Status The Device Status field is 2 bytes at offset AAh and is read only.
PCI Power Management Registers — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 205 Link CAP The Link CAP is 4 bytes at offset ACh and is read only.
Intel ® 82575EB Gigabit Ethernet Controller — PCI Power Management Registers Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 206 January 2011 Link Control The Link Control field is 2 bytes at offset B0h and is read only.
PCI Power Management Registers — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 207 Link Status The Link Status field is 2 bytes at offset B2h and is read only.
Intel ® 82575EB Gigabit Ethernet Controller — PCI Power Management Registers Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 208 January 2011 Reserved Reserved. 2 bytes at offset B4h and is read only.
PCI Power Management Registers — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 209 Device Control 2 Device Control 2 is 2 bytes at offset C8h.
Intel ® 82575EB Gigabit Ethernet Controller — PCI Power Management Registers Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 210 January 2011 6.6.5.3.1 PCIe* Extended Configuration Space PCIe* Configuration Space is located in a flat memory mapped address space.
PCI Power Management Registers — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide Jan.
Intel ® 82575EB Gigabit Ethernet Controller — PCI Power Management Registers Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
PCI Power Management Registers — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide Jan.
Intel ® 82575EB Gigabit Ethernet Controller — PCI Power Management Registers Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 214 January 2011 NOTE: This page intentionally left blank.
Power Management — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 215 7.
Intel ® 82575EB Gigabit Ethernet Controller — Auxiliary Power Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
Power Management Interconnects — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 217 Note: This auxiliary current limit only applies when the primary 3.
Intel ® 82575EB Gigabit Ethernet Controller — Power Management Interconnects Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
Power Management Interconnects — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 219 Figure 24. Link Power Management 7.4.
Intel ® 82575EB Gigabit Ethernet Controller — Power Management Interconnects Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 220 January 2011 This avoids negotiating through the LPLU procedure a link speed that is not advertised by the user.
Power Management Interconnects — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 221 7.4.0.3.3 Non-D0a State The PHY can negotiate to a low speed while in a non-D0a states (Dr, D0u, or D3).
Intel ® 82575EB Gigabit Ethernet Controller — Power States Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 222 January 2011 7.4.0.3.6 SerDes/SGMII Power-Down State Each of the 82575’s SerDes enters a power-down state when none of its clients are enabled.
Power States — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 223 • .
Intel ® 82575EB Gigabit Ethernet Controller — Power States Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 224 January 2011 On a transition from D3 to D0u, the 82575 PCI Configuration space is not reset.
Power States — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 225 As a response to being programmed into the D3 state, the 82575 brings its PCIe* link into the L1 link state.
Intel ® 82575EB Gigabit Ethernet Controller — Power-State Transitions Timing Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 226 January 2011 7.4.2 Power-State Transitions Timing The following sections give detailed timing for the state transitions.
Power-State Transitions Timing — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 227 7.
Intel ® 82575EB Gigabit Ethernet Controller — Power-State Transitions Timing Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
Power-State Transitions Timing — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 229 7.4.2.4 D0a to Dr and Back without Transition to D3 7.
Intel ® 82575EB Gigabit Ethernet Controller — 82575 and SerDes Power-Down State Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 230 January 2011 7.4.2.6 Timing Guarantees The 82575 guarantees the following start up and power state transition related timing parameters.
Wake Up — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 231 The SerDes also enters a power-down state in the following cases: • When the 82575 is configured for PHY operation only.
Intel ® 82575EB Gigabit Ethernet Controller — PCIe Power Management Wakeup Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 232 January 2011 • Sets the Magic Packet Received bit in the Wake Up Status Register (WUS).
Wake-Up Packets — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 233 PE_WAKE_N remains asserted until the operating system either writes a 1b to the PME_Status bit of the PMCSR or writes a 0b to the PME_EN bit.
Intel ® 82575EB Gigabit Ethernet Controller — Wake-Up Packets Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 234 January 2011 For multicast packets, the upper bits of the destination address in the incoming packet index a bit vector.
Wake-Up Packets — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 235 Note: Accepting broadcast magic packets for wake up purposes when Broadcast Accept bit of the Receive Control Register (RCTL.
Intel ® 82575EB Gigabit Ethernet Controller — Wake-Up Packets Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
Wake-Up Packets — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 237 Filter Value Table (FFVT). These contain separate values for each filter.
Intel ® 82575EB Gigabit Ethernet Controller — Wake-Up Packets Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 238 January 2011 7.5.3.2.3 IPv6 Neighbor Discovery Filter In Ipv6, a Neighbor Discovery packet is used for address resolution.
DCA — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 239 8.0 DCA This section describes the Direct Cache Access (DCA) functionality for the 82575.
Intel ® 82575EB Gigabit Ethernet Controller — PCIe* Message Format for DCA (MWr Mode) Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
Ethernet Interface — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 241 9.0 Ethernet Interface The 82575 provides a complete CSMA/CD function supporting IEEE 802.
Intel ® 82575EB Gigabit Ethernet Controller — Internal MAC/PHY 10/100/1000Base-T Interface Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
Duplex Operation for Copper PHY Operation — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.
Intel ® 82575EB Gigabit Ethernet Controller — Half Duplex Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
SGMII Encoding in 10/100 Mb/s — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 245 9.2.3.2 Code Groups and Ordered Sets Code group and ordered set definitions are defined in clause 36 of the IEEE 802.
Intel ® 82575EB Gigabit Ethernet Controller — Auto-Negotiation and Link Setup Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
SerDes Link Configuration — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 247 A set of registers is provided to facilitate hardware Auto-Negotiation.
Intel ® 82575EB Gigabit Ethernet Controller — SerDes Link Configuration Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 248 January 2011 there is a valid signal being received by the optics or the SerDes.
Copper PHY Link Configuration — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 249 9.
Intel ® 82575EB Gigabit Ethernet Controller — Copper PHY Link Configuration Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 250 January 2011 There might be circumstances when the software device driver must forcibly set the link speed of the MAC.
Loss of Signal/Link Status Indication — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.
Intel ® 82575EB Gigabit Ethernet Controller — Flow Control Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
Flow Control — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 253 Note: “S” is the Start-of-Packet delimiter and “T” is the first part of the End-of-Packet delimiters for 802.
Intel ® 82575EB Gigabit Ethernet Controller — Discard PAUSE Frames and Pass MAC Control Frames Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
Software Initiated PAUSE Frame Transmission — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 255 Hardware sends a PAUSE frame if it has previously sent one and the FIFO overflows even if the refresh timer did not expire.
Intel ® 82575EB Gigabit Ethernet Controller — MAC Loopback Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
Internal SerDes Loopback — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 257 — Clear the Loopback bit (bit 14) — Set the Auto Neg Enable bit (bit 12) — Register values should be: a.
Intel ® 82575EB Gigabit Ethernet Controller — External PHY Loopback Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
802.1q VLAN Support — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 259 10.0 802.1q VLAN Support The 82575 provides several specific mechanisms to support 802.
Intel ® 82575EB Gigabit Ethernet Controller — Transmitting and Receiving 802.1q Packets Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 260 January 2011 Table 82. 802.1q Tagged Frames 10.
Stripping 802.1q Tags on Receives — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 261 10.2.2 Stripping 802.1q Tags on Receives Software can instruct the 82575 to strip 802.
Intel ® 82575EB Gigabit Ethernet Controller — Double VLAN Support Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
PHY Functionality and Features — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 263 11.
Intel ® 82575EB Gigabit Ethernet Controller — Determining Link State Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
Forced Operation — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 265 .
Intel ® 82575EB Gigabit Ethernet Controller — Parallel Detection Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 266 January 2011 11.2.4 Parallel Detection Parallel detection can only be used to establish 10 and 100 links.
Link Criteria — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 267 11.
Intel ® 82575EB Gigabit Ethernet Controller — Flow Control Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
Management Data Interface — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 269 11.5 Management Data Interface The PHY supports the IEEE 802.
Intel ® 82575EB Gigabit Ethernet Controller — Transmit Functions Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 270 January 2011 Figure 30. 1000 Base-T PHY Functions Overview 11.
Transmit FIFO — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 271 2. Each channel (A, B, C, D) gets a unique signature that the receiver uses for identification.
Intel ® 82575EB Gigabit Ethernet Controller — Transmit FIFO Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 272 January 2011 11.8.2.5 Low-Pass Filter To aid with EMI, this filter attenuates signal components more than 180 Mhz.
Receive Functions — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 273 11.
Intel ® 82575EB Gigabit Ethernet Controller — 100 Mb/s Operation Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 274 January 2011 The descrambler requires approximately 15 s. to lock, normally accomplished during the training phase.
10Base-T Link Failure Criteria and Override — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.
Intel ® 82575EB Gigabit Ethernet Controller — Dribble Bits Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
Configurable LED Outputs — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 277 12.0 Configurable LED Outputs The 82575 implements four output drivers intended for driving external LED circuits per port.
Intel ® 82575EB Gigabit Ethernet Controller — Configurable LED Outputs Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
Dual Port Characteristics — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 279 13.0 Dual Port Characteristics The 82575 architecture includes two instances both the MAC and PHY.
Intel ® 82575EB Gigabit Ethernet Controller — PCIe* Interface Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
MAC Configuration Register Space — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 281 13.1.2 MAC Configuration Register Space All device control/status registers detailed in Section 14.
Intel ® 82575EB Gigabit Ethernet Controller — Link Mode/Configuration Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
Multi-Function Advertisement — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 283 code of this function changes to other values 10A6h and FF00h, respectively.
Intel ® 82575EB Gigabit Ethernet Controller — BIOS Handling of Device Disable Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 284 January 2011 While in device disable mode, the PCIe* link is in L3 state.
Copper/Fiber Switch — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 285 Software can then enable the OMED interrupt in ICR in order to get an indication on any detection of energy in the non active connection.
Intel ® 82575EB Gigabit Ethernet Controller — Copper/Fiber Switch Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
Copper/Fiber Switch — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 287 NOTE: This page intentionally left blank.
Intel ® 82575EB Gigabit Ethernet Controller — Copper/Fiber Switch Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
Register Descriptions — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 287 14.0 Register Descriptions This section details the state inside the 82575 that are visible to the programmer.
Intel ® 82575EB Gigabit Ethernet Controller — Register Conventions Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 288 January 2011 • Register pairs where two 32-bit registers make up a larger logical size.
Memory and I/O Address Decoding — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 289 Table 87. Field Attributes 14.1.1 Memory and I/O Address Decoding 14.
Intel ® 82575EB Gigabit Ethernet Controller — I/O-Mapped Internal Register, Internal Memory, and Flash Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
I/O-Mapped Internal Register, Internal Memory, and Flash — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.
Intel ® 82575EB Gigabit Ethernet Controller — Register Summary Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 292 January 2011 case, the 82575 delays the results through normal bus methods.
Register Summary — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 293 .
Intel ® 82575EB Gigabit Ethernet Controller — Register Summary Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
Register Summary — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 295 .
Intel ® 82575EB Gigabit Ethernet Controller — Register Summary Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
Register Summary — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 297 .
Intel ® 82575EB Gigabit Ethernet Controller — Main Register Descriptions Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 298 January 2011 Note: The PHY registers are accessed through the MDI/O interface.
Device Control Register - CTRL (00000h; R/W) — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.
Intel ® 82575EB Gigabit Ethernet Controller — Device Control Register - CTRL (00000h; R/W) Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
Device Control Register - CTRL (00000h; R/W) — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.
Intel ® 82575EB Gigabit Ethernet Controller — Device Status Register - STATUS (00008h; R) Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
EEPROM/Flash Control Register - EEC (00010h; R/W) — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 303 14.3.3 EEPROM/Flash Control Register - EEC (00010h; R/W) This register provides software direct access to the EEPROM.
Intel ® 82575EB Gigabit Ethernet Controller — EEPROM/Flash Control Register - EEC (00010h; R/ W) Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
EEPROM Read Register - EERD (00014h; RW) — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.
Intel ® 82575EB Gigabit Ethernet Controller — Extended Device Control Register - CTRL_EXT (00018h, R/W) Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
Extended Device Control Register - CTRL_EXT (00018h, R/W) — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.
Intel ® 82575EB Gigabit Ethernet Controller — Extended Device Control Register - CTRL_EXT (00018h, R/W) Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
Flash Access - FLA (0001Ch; R/W) — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 309 14.3.6 Flash Access - FLA (0001Ch; R/W) This register provides software direct access to the Flash.
Intel ® 82575EB Gigabit Ethernet Controller — MDI Control Register - MDIC (00020h; R/W) Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
PHY Registers — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 311 Note: After a PHY reset, access through the MDIC register should not be attempted for 300 s.
Intel ® 82575EB Gigabit Ethernet Controller — PHY Registers Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 312 January 2011 Table 89. PHY Register Bit Mode Definitions 14.3.8.1 PHY Control Register - PCTRL (00d; R/W) Register Mode Description LH Latched High.
PHY Registers — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 313 14.3.8.2 PHY Status Register - PSTATUS (01d; R) Speed Selection (LSB) 13 See Speed Selection (MSB), bit 6.
Intel ® 82575EB Gigabit Ethernet Controller — PHY Registers Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 314 January 2011 14.3.8.3 PHY Identifier Register 1 (LSB) - PHY ID 1 (02d; R) 14.
PHY Registers — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 315 14.3.8.6 Auto-Negotiation Base Page Ability Register - (05d; R) PAUSE 10 Advertise to Partner that Pause operation (as defined in 802.
Intel ® 82575EB Gigabit Ethernet Controller — PHY Registers Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 316 January 2011 14.3.8.7 Auto-Negotiation Expansion Register - ANE (06d; R) 14.
PHY Registers — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 317 14.3.8.9 Auto-Negotiation Next Page Ability Register - LPN (08d; R) 14.
Intel ® 82575EB Gigabit Ethernet Controller — PHY Registers Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 318 January 2011 14.3.8.11 1000BASE-T/100BASE-T2 Status Register - GSTATUS (10d; R) 1.
PHY Registers — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 319 14.3.8.12 Extended Status Register - ESTATUS (15d; R) 14.
Intel ® 82575EB Gigabit Ethernet Controller — PHY Registers Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 320 January 2011 14.3.8.14 Port Status 1 Register - PSTAT (17d; RO) Transmit Disable 13 1b = Disable twisted-pair transmitter.
PHY Registers — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 321 14.3.8.15 Port Control Register - PCONT (18d; R/W) Receive Status 12 1b = PHY currently receiving a packet.
Intel ® 82575EB Gigabit Ethernet Controller — PHY Registers Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 322 January 2011 14.3.8.16 Link Health Register - LINK (19d; RO) MDI-X Mode 13 Force MDI-X mode.
PHY Registers — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 323 14.3.8.17 1000Base-T FIFO Register - PFIFO (20d; R/W) Gigabit Master Resolution 12 Gig has resolved to master.
Intel ® 82575EB Gigabit Ethernet Controller — PHY Registers Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 324 January 2011 14.3.8.18 Channel Quality Register - CHAN (21d; RO) 14.
PHY Registers — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 325 14.
Intel ® 82575EB Gigabit Ethernet Controller — SERDES ANA - SERDESCTL (00024h; R/W) Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 326 January 2011 14.3.8.23 Page Select Core Register - (31d; WO) 14.
VLAN Ether Type - VET (00038h; R/W) — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 327 14.3.11 VLAN Ether Type - VET (00038h; R/W) This register contains the type field hardware matches against to recognize an 802.
Intel ® 82575EB Gigabit Ethernet Controller — Flow Control Address Low - FCAL (00028h; R/W) Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 328 January 2011 Table 90. PCIe* Performance 14.
Flow Control Type - FCT (00030h; R/W) — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.
Intel ® 82575EB Gigabit Ethernet Controller — LED Control - LEDCTL (00E00h; RW) Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
Packet Buffer Allocation - PBA (01000h; R/W) — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 331 Table 91. Mode Encodings 14.
Intel ® 82575EB Gigabit Ethernet Controller — Packet Buffer Size - PBS (01008h; R/W) Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
SFP 12C Parameters - I2CPARAMS (0102Ch; R/W) — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.
Intel ® 82575EB Gigabit Ethernet Controller — Flash Opcode - FLASHOP (0103Ch; R/W) Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
Manageability EEPROM Control Register - EEMNGCTL (01010h; RO) — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.
Intel ® 82575EB Gigabit Ethernet Controller — Manageability EEPROM Read/Write Data - EEMNGDATA (1014h; RO) Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 336 January 2011 14.3.25 Manageability EEPROM Read/Write Data - EEMNGDATA (1014h; RO) 14.
Manageability Flash Read Counter - FLMNGCNT (1020h; R/W) — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 337 (101Ch; R/W) 14.
Intel ® 82575EB Gigabit Ethernet Controller — Watchdog Setup - WDSTP (01040h; R/W) Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 338 January 2011 Note: • More than one valid bit can be set for write accesses.
Free Running Timer - FRTIMER (01048h; RWS) — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.
Intel ® 82575EB Gigabit Ethernet Controller — Interrupt Cause Read Register - ICR (000C0H; R) Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
Interrupt Cause Set Register - ICS (000C8h; WO) — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 341 14.3.35 Interrupt Cause Set Register - ICS (000C8h; WO) Software uses this register to set an interrupt condition.
Intel ® 82575EB Gigabit Ethernet Controller — Interrupt Mask Set/Read Register - IMS (000D0h; R/W) Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
Interrupt Mask Clear Register - IMC (000D8h; W) — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 343 14.3.37 Interrupt Mask Clear Register - IMC (000D8h; W) Software uses this register to disable an interrupt.
Intel ® 82575EB Gigabit Ethernet Controller — Interrupt Acknowledge Auto Mask Register - IAM (000E0h; R/W) Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
Extended Interrupt Cause - EICR (01580h; RC/W1C) — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.
Intel ® 82575EB Gigabit Ethernet Controller — Extended Interrupt Mask Set/Read - EIMS (01524h; RWS) Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
Extended Interrupt Auto Clear - EIAC (0152Ch; R/W) — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 347 Software blocks interrupts by clearing the corresponding mask bit.
Intel ® 82575EB Gigabit Ethernet Controller — Interrupt Throttle - EITR (01680h + 4*n [n = 0..9]; R/W) Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 348 January 2011 14.3.45 Interrupt Throttle - EITR (01680h + 4*n [n = 0.
Immediate Interrupt Rx - IMIR (05A80h + 4*n [n = 0..7]; R/W) — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 349 14.3.46 Immediate Interrupt Rx - IMIR (05A80h + 4*n [n = 0.
Intel ® 82575EB Gigabit Ethernet Controller — Immediate Interrupt Rx Extended - IMIREXT (05AA0h + 4*n [n = 0..7]; R/W) Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 350 January 2011 14.
MSI-X Allocation - MSIXBM (01600h + 4*n [n = 0..9]; R/W) — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 351 14.3.49 MSI-X Allocation - MSIXBM (01600h + 4*n [n = 0.
Intel ® 82575EB Gigabit Ethernet Controller — Receive Control Register - RCTL (00100h; R/W) Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 352 January 2011 Field Bit(s) Initial Value Description Reserved 0 0b Reserved Write to 0b for future compatibility.
Receive Control Register - RCTL (00100h; R/W) — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.
Intel ® 82575EB Gigabit Ethernet Controller — Split and Replication Receive Control - SRRCTL (0280Ch + 100*n [n=0..3]; R/W) Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 354 January 2011 14.
Packet Split Receive Type - PSRTYPE (05480h + 4*n [n=0..3]; R/W) — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 355 14.
Intel ® 82575EB Gigabit Ethernet Controller — Flow Control Receive Threshold Low - FCRTL (02160h; R/W) Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
Flow Control Receive Threshold High - FCRTH (02168h; R/W) — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.
Intel ® 82575EB Gigabit Ethernet Controller — Receive Descriptor Base Address High - RDBAH (02804h + 100*n [n=0..3]; R/W) Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 358 January 2011 14.
Receive Descriptor Head - RDH (02810h + 100*n [n=0..3]; R/W) — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 359 14.3.58 Receive Descriptor Head - RDH (02810h + 100*n [n=0.
Intel ® 82575EB Gigabit Ethernet Controller — Receive Descriptor Control - RXDCTL (02828h + 100*n [n=0..3]; R/W) Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 360 January 2011 14.
Receive Checksum Control - RXCSUM (05000h; R/W) — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.
Intel ® 82575EB Gigabit Ethernet Controller — Receive Long Packet Maximum Length - RLPML (05004; R/W) Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 362 January 2011 14.3.62 Receive Long Packet Maximum Length - RLPML (05004; R/W) 14.
Transmit Control Register - TCTL (00400h; R/W) — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 363 14.3.64 Transmit Control Register - TCTL (00400h; R/ W) This register controls all transmit functions for the 82575.
Intel ® 82575EB Gigabit Ethernet Controller — Transmit Control Extended - TCTL_EXT (00404;R/ W) Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 364 January 2011 14.3.65 Transmit Control Extended - TCTL_EXT (00404;R/W) This register controls late collision detection.
Transmit IPG Register - TIPG (00410;R/W) — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 365 14.3.66 Transmit IPG Register - TIPG (00410;R/W) This register controls the Inter Packet Gap (IPG) timer.
Intel ® 82575EB Gigabit Ethernet Controller — Transmit Descriptor Base Address Low - TDBAL (03800h + 100*n [n=0..3]; R/W) Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 366 January 2011 14.
Transmit Descriptor Length - TDLEN (03808h + 100*n [n=0..3]; R/W) — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 367 14.
Intel ® 82575EB Gigabit Ethernet Controller — Transmit Descriptor Control - TXDCTL (03828h + 100*n [n=0..3]; R/W) Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 368 January 2011 • Queue1 - TDT1 (03918h) • Queue2 - TDT2 (03A18h) • Queue3 - TDT3 (03B18h) 14.
Tx Descriptor Completion Write-Back Address Low - TDWBAL (03838h + 100*n [n=0..3]; R/W) — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 369 14.
Intel ® 82575EB Gigabit Ethernet Controller — Tx Descriptor Completion Write-Back Address High - TDWBAH (0383Ch + 100*n [n=0..3]; R/W) Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
PCS Link Control - PCS_LCTL (04208h; R/W) — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.
Intel ® 82575EB Gigabit Ethernet Controller — PCS Link Status - PCS_LSTS (0420Ch; R/W) Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
AN Advertisement - PCS_ANADV (04218h; R/W) — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.
Intel ® 82575EB Gigabit Ethernet Controller — Link Partner Ability - PCS_LPAB (0421Ch; RO) Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
Next Page Transmit - PCS_NPTX (04220h; RO) — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.
Intel ® 82575EB Gigabit Ethernet Controller — Link Partner Ability Next Page - PCS_LPABNP (04224h; RO) Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 376 January 2011 14.3.82 Link Partner Ability Next Page - PCS_LPABNP (04224h; RO) 14.
Rx DCA Control Registers - RXCTL (02814h 100h *n [n=0..3]; R/W) — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.
Intel ® 82575EB Gigabit Ethernet Controller — Tx DCA Control Registers - TXCTL (03814h + 100h *n [n=0..3]; R/W) Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 378 January 2011 14.
Multicast Table Array - MTA (05200h + 4*n [n..127]; R/W) — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 379 14.5.1 Multicast Table Array - MTA (05200h + 4*n [n.
Intel ® 82575EB Gigabit Ethernet Controller — Receive Address Low - RAL (05400h + 8*n [n=0..15]; R/W) Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 380 January 2011 14.5.2 Receive Address Low - RAL (05400h + 8*n [n=0.
VLAN Filter Table Array - VFTA (05600h + 4*n [n=0..127]; R/W) — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 381 14.5.4 VLAN Filter Table Array - VFTA (05600h + 4*n [n=0.
Intel ® 82575EB Gigabit Ethernet Controller — Multiple Receive Queues Command Register - MRQC (05818h; R/W) Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 382 January 2011 14.5.5 Multiple Receive Queues Command Register - MRQC (05818h; R/W) Notes: 1.
Redirection Table - RETA (05C00h + 4*n [n=0..31]; R/W) — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 383 14.5.6 Redirection Table - RETA (05C00h + 4*n [n=0.
Intel ® 82575EB Gigabit Ethernet Controller — RSS Random Key Register - RSSRK (05C80h + 4*n [n=0..9]; R/W) Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 384 January 2011 14.5.7 RSS Random Key Register - RSSRK (05C80h + 4*n [n=0.
VLAN Filter Queue Array 0 - VFQA0 (0B100h + 4*n [n=0…127]; R/W) — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 385 14.
Intel ® 82575EB Gigabit Ethernet Controller — Wakeup Filter Control Register - WUFC (05808h; R/ W) Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
Wakeup Status Register - WUS (05810h; R/W1C) — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.
Intel ® 82575EB Gigabit Ethernet Controller — IPv4 Address Table - IP4AT (05840h + 8*n [n=0..3]; R/W) Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 388 January 2011 14.6.5 IPv4 Address Table - IP4AT (05840h + 8*n [n=0.
Wakeup Packet Length - WUPL (05900h; RC) — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 389 14.6.7 Wakeup Packet Length - WUPL (05900h; RC) This register indicates the length of the first wakeup packet received.
Intel ® 82575EB Gigabit Ethernet Controller — Flexible Filter Value Table - FFVT (09800h + 8*n [n=0..127]; R/W) Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 390 January 2011 14.
Manageability Registers — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 391 All reserved fields read as 0's and ignore writes.
Intel ® 82575EB Gigabit Ethernet Controller — Management Flex UDP/TCP Ports - MFUTP (5030h + 4*n [n=0..7]; R/W) Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 392 January 2011 14.
Manageability Filters Valid - MFVAL (5824h; R/W) — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.
Intel ® 82575EB Gigabit Ethernet Controller — Management Control to Host Register - MANC2H (5860h; R/W) Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
Manageability IP Address Filter - MIPAF (0x58B0-0x58EC; RW) — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.
Intel ® 82575EB Gigabit Ethernet Controller — Manageability IP Address Filter - MIPAF (0x58B0- 0x58EC; RW) Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
Manageability IP Address Filter - MIPAF (0x58B0-0x58EC; RW) — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.
Intel ® 82575EB Gigabit Ethernet Controller — Manageability MAC Address Low - MMAL (5910h + 8*n[n=0..3]; RW) Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 398 January 2011 14.7.
Flexible TCO Filter Table Registers - FTFT (09400h-097FCh; RW) — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.
Intel ® 82575EB Gigabit Ethernet Controller — Legacy Sensor Polling Mask 1...8 Register (F8h:FFh) Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 400 January 2011 14.7.11 Legacy Sensor Polling Mask 1.
PCIe* Control - GCR (05B00h; R) — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 401 L0s_Entry_Lat 24 0b L0s Entry Latency Set to 0b to indicate L0s entry latency is the same as L0s exit latency.
Intel ® 82575EB Gigabit Ethernet Controller — PCIe* Control - GCR (05B00h; R) Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 402 January 2011 Completion_ Timeout_Value (RO or RW1) 15:12 0h Indicates the selected value for completion timeout (after an Internal_Power_On_Reset).
Function Tag - FUNCTAG (05B08h; R/W) — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 403 14.8.2 Function Tag - FUNCTAG (05B08h; R/W) 14.
Intel ® 82575EB Gigabit Ethernet Controller — PCIe* Statistics Control #2 - GSCL_2 (05B14h; R) Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 404 January 2011 Table 92 lists the encoding of the events.
PCIe* Statistics Control #2 - GSCL_2 (05B14h; R) — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 405 Clock counter 20 Counts GIO cycles.
Intel ® 82575EB Gigabit Ethernet Controller — PCIe* Statistics Control #2 - GSCL_2 (05B14h; R) Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 406 January 2011 Average latency of read request – from initialization until end of completions.
PCIe* Statistics Control #3 - GSCL_3 (05B18h; R/W) — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.
Intel ® 82575EB Gigabit Ethernet Controller — PCIe* Counter #2 - GSCN_2 (05B28h; R/W) Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 408 January 2011 14.8.9 PCIe* Counter #2 - GSCN_2 (05B28h; R/W) 14.
SerDes/CCM/PCIe* CSR - GIOANACTL0 (05B34h; R/W) — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 409 14.8.12 SerDes/CCM/PCIe* CSR - GIOANACTL0 (05B34h; R/W) Firmware uses this register for analog circuit configuration.
Intel ® 82575EB Gigabit Ethernet Controller — GIOANACTL3 (05B40h; R/W) Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 410 January 2011 14.8.15 GIOANACTL3 (05B40h; R/W) Firmware uses this register for analog circuit configuration.
Software Semaphore - SWSM (05B50h; R/W) — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 411 14.8.19 Software Semaphore - SWSM (05B50h; R/W) 14.
Intel ® 82575EB Gigabit Ethernet Controller — Firmware Semaphore - FWSM (05B58h; R/WS) Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
Software-Firmware Synchronization - SW_FW_SYNC (05B5Ch; R/WS) — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 413 Notes: 1.
Intel ® 82575EB Gigabit Ethernet Controller — Software-Firmware Synchronization - SW_FW_SYNC (05B5Ch; R/WS) Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
Mirrored Revision ID - MREVID (05B64h; R/W) — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 415 14.8.22 Mirrored Revision ID - MREVID (05B64h; R/W) 14.
Intel ® 82575EB Gigabit Ethernet Controller — DCA Control - DCA_CTRL (05B74h; R/W) Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
Alignment Error Count - ALGNERRC (04004h; RC) — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.
Intel ® 82575EB Gigabit Ethernet Controller — Single Collision Count - SCC (04014h; RC) Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
Defer Count - DC (04030h; RC) — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 419 14.9.11 Defer Count - DC (04030h; RC) This register counts defer events.
Intel ® 82575EB Gigabit Ethernet Controller — XON Transmitted Count - XONTXC (0404Ch; RC) Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 420 January 2011 14.9.15 XON Transmitted Count - XONTXC (0404Ch; RC) This register counts the number of XON packets transmitted.
Packets Received (64 Bytes) Count - PRC64 (0405Ch; RC) — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.
Intel ® 82575EB Gigabit Ethernet Controller — Packets Received (512-1023 Bytes) Count - PRC1023 (0406Ch; RC) Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 422 January 2011 14.9.
Broadcast Packets Received Count - BPRC (04078h; RC) — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.
Intel ® 82575EB Gigabit Ethernet Controller — Good Octets Received Count - GORCL (04088h; RC)/GORCH (0408Ch; RC) Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 424 January 2011 14.
Receive Undersize Count - RUC (040A4h; RC) — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.
Intel ® 82575EB Gigabit Ethernet Controller — Management Packets Received Count - MNGPRC (040B4h; RC) Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 426 January 2011 Packets over 1518/1522/1526 bytes are oversized if LPE is 0b.
Total Octets Received - TORL (040C0h; RC) / TORH (040C4h; RC) — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.
Intel ® 82575EB Gigabit Ethernet Controller — Total Packets Transmitted - TPT (040D4h; RC) Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 428 January 2011 14.9.42 Total Packets Transmitted - TPT (040D4h; RC) This register counts the total number of all packets transmitted.
Packets Transmitted (128-255 Bytes) Count - PTC255 (040E0h; RC) — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 429 14.9.
Intel ® 82575EB Gigabit Ethernet Controller — Multicast Packets Transmitted Count - MPTC (040F0h; RC) Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 430 January 2011 Due to changes in the standard for maximum frame size for VLAN tagged frames in 802.
Interrupt Assertion Count - IAC (04100h; RC) — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.
Intel ® 82575EB Gigabit Ethernet Controller — SerDes/SGMII Code Violation Packet Count - SCVPC (04228h; R/WS) Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 432 January 2011 14.9.
Receive Data FIFO Head Saved Register - RDFHS (02420h; RO) — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.
Intel ® 82575EB Gigabit Ethernet Controller — PB Descriptor Read Pointers - PBDESCRP (02454h; RO) Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 434 January 2011 14.10.6 PB Descriptor Read Pointers - PBDESCRP (02454h; RO) 14.
Transmit Data FIFO Tail Register - TDFT (03418h; R/WS) — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.
Intel ® 82575EB Gigabit Ethernet Controller — Transmit Data FIFO Packet Count - TDFPC (03430h; RO) Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
Tx Descriptor Handler ECC Error Inject - TDHEEI (035F8h; R/W) — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 437 14.10.
Intel ® 82575EB Gigabit Ethernet Controller — Packet Buffer Memory - PBM (10000h - 10FFCh; R/ W) Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 438 January 2011 14.10.16 Packet Buffer Memory - PBM (10000h - 10FFCh; R/W) All PBM (FIFO) data is available to diagnostics.
Tx Descriptor Handler Memory Page Number - TDHMP (035FCh; R/W) — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.
Intel ® 82575EB Gigabit Ethernet Controller — Packet Buffer ECC Status - PBECCSTS (0245Ch; R/ W) Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 440 January 2011 14.10.20 Packet Buffer ECC Status - PBECCSTS (0245Ch; R/W) 14.
Tx Descriptor Handler ECC Status - TDHESTS (0246Ch; R/W) — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 441 14.10.22 Tx Descriptor Handler ECC Status - TDHESTS (0246Ch; R/W) 14.
Intel ® 82575EB Gigabit Ethernet Controller — Packet Generator Source Address Low - PGSAL (04288h; R/W) Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 442 January 2011 14.11.3 Packet Generator Source Address Low - PGSAL (04288h; R/W) 14.
Packet Generator Packet Length - PGPL (04294h; R/W) — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.
Intel ® 82575EB Gigabit Ethernet Controller — Packet Generator StaPGSTS Bit Description Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 444 January 2011 14.11.8 Packet Generator StaPGSTS Bit Description 14.
MSI-X Registers — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 445 14.12 MSI-X Registers These registers are used to configure the MSI-X mechanism.
Intel ® 82575EB Gigabit Ethernet Controller — MSI-X Table Entry Lower Address - MSIXTADD (00000h - 00090h; R/W) Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 446 January 2011 14.
MSI-X Pending Bit Array - MSIXPBA Bit Description — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.
Intel ® 82575EB Gigabit Ethernet Controller — MSI-X Pending Bit Array - MSIXPBA Bit Description Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 448 January 2011 NOTE: This page intentionally left blank.
Diagnostics and Testability — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 449 15.
Intel ® 82575EB Gigabit Ethernet Controller — Testability Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 450 January 2011 • MAC Loopback while operating with the internal PHY. • MAC Loopback, by setting the LBM bits in RCTL register to 11b.
BYPASS Instruction — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 451 15.2.4 BYPASS Instruction This instruction is the only instruction defined by the standard that causes operation of the bypass register.
Intel ® 82575EB Gigabit Ethernet Controller — BYPASS Instruction Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
Statistics — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 453 16.0 Statistics The 82575 supports different statistics counters as described in Section 14.
Intel ® 82575EB Gigabit Ethernet Controller — OID_GEN_STATISTICS Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.1 454 January 2011 A part of the optional package is also implemented as listed in the following table: 16.
RMON — Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Intel ® 82575EB Gigabit Ethernet Controller Revision: 2.1 Software Developer’s Manual and EEPROM Guide January 2011 455 16.3 RMON The 82575 supports the part of the RMON Ethernet statistics group as defined by IETF RFC 2819.
Intel ® 82575EB Gigabit Ethernet Controller — Linux net_device_stats Intel ® 82575EB Gigabit Ethernet Controller 324632-003 Software Developer’s Manual and EEPROM Guide Revision: 2.
Un punto importante, dopo l’acquisto del dispositivo (o anche prima di acquisto) è quello di leggere il manuale. Dobbiamo farlo per diversi motivi semplici:
Se non hai ancora comprato il Intel 324632-003 è un buon momento per familiarizzare con i dati di base del prodotto. Prime consultare le pagine iniziali del manuale d’uso, che si trova al di sopra. Dovresti trovare lì i dati tecnici più importanti del Intel 324632-003 - in questo modo è possibile verificare se l’apparecchio soddisfa le tue esigenze. Esplorando le pagine segenti del manuali d’uso Intel 324632-003 imparerai tutte le caratteristiche del prodotto e le informazioni sul suo funzionamento. Le informazioni sul Intel 324632-003 ti aiuteranno sicuramente a prendere una decisione relativa all’acquisto.
In una situazione in cui hai già il Intel 324632-003, ma non hai ancora letto il manuale d’uso, dovresti farlo per le ragioni sopra descritte. Saprai quindi se hai correttamente usato le funzioni disponibili, e se hai commesso errori che possono ridurre la durata di vita del Intel 324632-003.
Tuttavia, uno dei ruoli più importanti per l’utente svolti dal manuale d’uso è quello di aiutare a risolvere i problemi con il Intel 324632-003. Quasi sempre, ci troverai Troubleshooting, cioè i guasti più frequenti e malfunzionamenti del dispositivo Intel 324632-003 insieme con le istruzioni su come risolverli. Anche se non si riesci a risolvere il problema, il manuale d’uso ti mostrerà il percorso di ulteriori procedimenti – il contatto con il centro servizio clienti o il servizio più vicino.