Manuale d’uso / di manutenzione del prodotto 752I del fabbricante Emerson
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Katana ® 752i: Intelligent CompactPCI Blade for cPSB User’s Manual from Emerson Network Power ™ Embedded Computing April 2008.
The informatio n in this manu al has been che cked and is beli eved to be accu rate and reli - able. HOWEVER, NO RESPONSIBILITY IS ASSUMED BY EMERSON NETWORK POWER, EMBEDDED COMPUTING FOR ITS USE OR FOR ANY INACCURACIES. S pecifications are sub- ject to change without noti ce.
10006024-04 Katana ®752i User’s Manual i Regulatory Agency Warnings & Notices The Emerson Katana752i meets the requi remen ts set forth by the F ederal Communicati ons Commission (FCC) in Ti tle 47 of the Code of Federal Regulations. T he following informatio n is provided as required by this agency.
(continued) Katana ®752i User’s Manual 10006024-04 ii EC Declaration of Conformity According to EN 45014:1998 Manufacturer’s Na me: Emerson Network Power Embedded Computing Manufacturer’s Addre.
10006024-04 Katana ® 752i User’s Manual iii Contents 1O v e r v i e w Components and Features . . . . . . . . . . . 1-1 Functional Overv iew . . . . . . . . . . . . . . . . 1-4 Additional I nformation . . . . . . . . . . . . . . 1-5 Product Certifi cation .
Katana ® 752i User’s Manual 10006024-04 iv (blank page ) 8L o c a l P C I B u s PCI Enumeration . . . . . . . . . . . . . . . . . . . . .8-1 PCI ID Select and Interr upts . . . . . . . . . . .8-1 Geographical Addr essing . . . . . . . . . . . . .8-2 PCI Bus Control Signal s .
Contents (continued) 10006024-04 Katana ® 752i User’s Manual v JFFS2 File Systems. . . . . . . . . . . . . . . . . 15-12 ls . . . . . . . . . . . . . . . . . . . . . . . . . . . .15-12 fsinfo. . . . . . . . . . . . . . . . . . . . . . . . .15-12 fsload .
Katana ® 752i User’s Manual 10006024-04 vi (blank page ).
10006024-04 Katana ® 752i User’s Manual vii Figures Figure 1-1: General System Blo ck Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4 Figure 2-1: Katana®752i Front P anel . . . . . . . . . . .
Katana ® 752i User’s Manual 10006024-04 viii (blank page ).
10006024-04 Katana ® 752i User’s Manual ix Tables Table 1-1: Regulatory Agenc y Compliance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-5 Table 1-2: Technical References . . . . . . . . . . . . . . . .
Tables (continued) Katana ® 752i User’s Manual 10006024-04 x Table 11-17: Event Message Fo rmat . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-20 Table 11-18: System Firmware P rogress OEM Event Dat a .
10006024-04 Katana ® 752i User’s Manual i Registers Register 4-1: 750GL Hardware Imp lementation Dependent, HID0 . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-5 Register 4-2: 750GL Hardware Imp lementation Dependent, HID1 . . . . . . . . .
Katana ® 752i User’s Manual 10006024-04 ii (blank page ).
10006024-04 Katana ®752i User’s Manual 1-1 Section 1 Overview The Emerson Katana ® 752i is an intelligent input/output (I/O) processing blade for use in a CompactPCI backplane.
Overview: Components and Features Katana ®752i User’s Manual 10006024-04 1-2 SDRAM: The Katana®75 2i allows for a 7 2-bit Small-Out line Dual In-Lin e Memory Module (SO- DIMM) of up to two gi gabytes to su pport th e CPU. (Please contact Emerso n for the avail- ability of one- and two-gigabyte SO-DIMMs.
Overview: Components and Features 10006024-04 Katana ®752i User’s Manual 1-3 PTMC Sites: The Katana®752 i has two standard PC I Telecom Mezza nine Card (PTMC ) slots, which allow for the use of two compa tible PTMC boards, such as the Emerson PM/3Gv t elecommunica- tions interface card.
Overview: Functional Ov erview Katana ®752i User’s Manual 10006024-04 1-4 FUNCTIONAL OVERVIEW The following block diagram provi des a fu nctional overview for the Kat ana®752i.
Overview: Additional Information 10006024-04 Katana ®752i User’s Manual 1-5 ADDITIONAL INFORMATION This section lists t he Katana®752i hardware ’s regulatory certificat ions and briefly d iscusses the terminology and notat ion conventions used in this manual.
Overview: Additional Information Katana ®752i User’s Manual 10006024-04 1-6 Emerson maintains test reports that provide specific informati on regarding the methods and equipment used in compliance testing.
Overview: Additional Information 10006024-04 Katana ®752i User’s Manual 1-7 Table 1-2: Technical References Device/Interface :T y p e : D o c u m e n t : 1 CompactPCI CompactPCI ® Specification (PCI Industrial Computers Manufacturer s Group, PICMG ® 2.
Overview: Additional Information Katana ®752i User’s Manual 10006024-04 1-8 Ethernet BCM5461S BCM5461S 10/100/1000Base-T Gigabit Et hernet Transceiver Advance Data Sheet (Broadcom Corp.
Overview: Additional Information 10006024-04 Katana ®752i User’s Manual 1-9 If you have questi ons, please cal l Emerson Technic al Support at 1-800- 327-1251, visit the web site at http://www.emersonembedde dcomputing.com, o r send e-mail to support@a rtesyncp.
Katana ®752i User’s Manual 10006024-04 1-10 (blank page ).
10006024-04 Katana ® 752i User’s Ma nual 2-1 Section 2 Setup This chapter describes the physical layout of the boa rds, the setup process, and how to check for proper operat ion once the boards have been inst alled. This chapt er also includes troubleshooting, service, and warranty information.
Setup: Katana®752i Circuit Board Katana ® 752i User’s Manual 10006024-0 4 2-2 Figure 2-1: Katana ® 752i Front Panel PMC Site #2 PMC Site #1 EIA-232 Serial Port Reset Switch Programmable LEDs 1.
Setup: Katana®752i Circuit Board 10006024-04 Katana ® 752i User’s Ma nual 2-3 Figure 2-2: Component Map, Top (Rev. 03) J6 CR1 U15 C98 C62 C97 C88 C66 C71 C75 U34 F4 F3 C9 C124 C123 C8 Y2 C93 C114 .
Setup: Katana®752i Circuit Board Katana ® 752i User’s Manual 10006024-0 4 2-4 Figure 2-3: Component Map, Bottom (Rev . 03) C171 C347 C641 C627 C626 C657 C193 C182 C400 C386 C414 C472 C439 C441 C45.
Setup: Katana®752i Circuit Board 10006024-04 Katana ® 752i User’s Ma nual 2-5 Figure 2-4: Jumper, Fuse, and Switch Locations, Top COPYRIGHT 2004 10006008-00 REV A F4 F3 F1 F2 J3 J4 J5 J22 J21 J24 J23 J12 J1 1 J1 J2 J14 J13 P1 CR1 P2 JP2 JP1 SW1 SW1 Reset Switch F4 Fuse for 5-V olt Supply to RTM, 2.
Setup: Katana®752i Circuit Board Katana ® 752i User’s Manual 10006024-0 4 2-6 Figure 2-5: Fuse, and LED Locations, Bottom C171 C347 C641 C627 C626 C657 C193 C182 C400 C386 C414 C472 C439 C441 C456.
Setup: Katana®752i Circuit Board 10006024-04 Katana ® 752i User’s Ma nual 2-7 Identification Numbers Before you install t he Katana ® 752i circu it board in a syste m, you should record the follow- ing information: ❐ The board serial number: ___________ __________ _____________ __________ .
Setup: Katana®752i Circuit Board Katana ® 752i User’s Manual 10006024-0 4 2-8 J4 : J4 is a 90-pin connector that routes co mputer telephony (CT) bus signals to the Compact- PCI backplane. See Chapter for pinouts. J5: J5 is a 110-pin conn ector that routes user in put/output sign als directly from the J24 co nnec- tor at PTMC expansion site #2.
Setup: Katana®752i Setup 10006024-04 Katana ® 752i User’s Ma nual 2-9 KATANA ® 752I SETUP You need the following item s to set up and chec k the operation of th e Emerson Katana ® 752i.
Setup: Troubleshooting Katana ® 752i User’s Manual 10006024-0 4 2-10 Power Requirements The Emerson Katana ® 752 i circuit board typically requires abou t 35 watts of power when performing a si mple memory test with no PMC/PT MC modules insta lled.
Setup: Troubleshooting 10006024-04 Katana ® 752i User’s Ma nual 2-11 moninit <four-digit board serial number> noburn Executing the above comma nd will set all en vironment variables to defau lt values and erase any user-adde d environment variable s.
Setup: Troubleshooting Katana ® 752i User’s Manual 10006024-0 4 2-12 Please put the RMA number on the outside of the package so we can handle your problem efficiently. O ur service departmen t cannot ac cept material received without an RMA num- ber.
10006024-04 Katana ® 752i User’s Ma nual 3-1 Section 3 Reset Logic This chapter provides a system-l evel ov erview of the reset logic for th e Katana ® 752i. It also describes the various reset sources. GENERAL OVERVIEW The Katana ® 752i uses discrete logic on a programmable lo gic device (PLD) to impleme nt the reset circuitry.
Reset Logic: General Overview Katana ® 752i User’s Manual 10006024-0 4 3-2 Figure 3-1: Katana ® 752i Reset Diagram F r o n t P a n e l P u s h B u t to n 2 .
Reset Logic: Reset Sources 10006024-04 Katana ® 752i User’s Ma nual 3-3 RESET SOURCES The Katana ® 752i circuit board can be reset from the following sources: • Power-On Reset (POR) circuitr y .
Reset Logic: Reset Sources Katana ® 752i User’s Manual 10006024-0 4 3-4 Figure 3-2: 750GL Reset Logic Soldered Flash flash_wp MV64460 sysrst pci0_rst pci1_rst gt_wde COP/JTAG hreset sreset trst Dev.
10006024-04 Katana ® 752i User’s Ma nual 4-1 Section 4 Processor The Katana ® 752i processor complex consists of a processor and a system controller/PCI bridge devi ce (see Chapte r ) with associated memory and inp ut/output inte rfaces.
Processor: Processor Overview Katana ® 752i User’s Manual 10006024-0 4 4-2 Figure 4-1: 750GL Block Diagram Physical Memory Map The Katana ® 752i monitor ( see Chapter ) initiali zes the devices required to configure th e memory map for the 750GL bus.
Processor: Processor Overview 10006024-04 Katana ® 752i User’s Ma nual 4-3 Figure 4-2: 750GL Memory Map Device B us PLD Regist ers E800,0000 Flash S ocket F820,0000 FLASH (up to 128 MB) F810,0000 M.
Processor: Processor Reset Katana ® 752i User’s Manual 10006024-0 4 4-4 This table summarizes the physica l addresses for the 750GL on the Katana ® 752i board and provides a reference to mo re detailed information. Table 4-2: Katana ® 752i Address Summary PROCESSOR RESET Circuitry on the Katana ® 752i resets the processor and the board.
Processor: Processor Initialization 10006024-04 Katana ® 752i User’s Ma nual 4-5 Hardware I mplementatio n Dependent 0 Register The Hardware Imple mentation Depe ndent 0 Regist er (HID0) contains bi ts for CPU-specific features. Most of these bits are cleared on initi al power-up of the Katana ® 752i.
Processor: Processor Initialization Katana ® 752i User’s Manual 10006024-0 4 4-6 BTIC: Branch Target Instru ction Cache enable. ABE: Address Broadc ast Enable (for cac he ops, eie io , sync ). BHT: Branch History Table enable. NOOPTI: No-op the dcbt / dcbst instruction s.
Processor: Processor Initialization 10006024-04 Katana ® 752i User’s Ma nual 4-7 PR0: PLL0 Range selec t bits. PC1: PLL1 Configurat ion bits. PRI: PLL1 Range bits. Hardware I mplementatio n Dependent 2 Register Parity is implem ented for the fo llowing array s: I-Cache, I-Tag, D-Cache , D-Tag, and L2 Tag.
Processor: Exception Handling Katana ® 752i User’s Manual 10006024-0 4 4-8 EXCEPTION HANDLING Each CPU exception type transfers co ntrol to a different address in the vector tabl e. The vector table normally occupies the first 20 00 bytes of RAM (with a base address of 0000,0000 16 ) or ROM (with a base address of F800,0000 16 ).
Processor: Exception Processing 10006024-04 Katana ® 752i User’s Ma nual 4-9 EXCEPTION PROCESSING When an excepti on occurs, the addr ess saved in Machine S tatus Save/Resto re register 0 (SRR0) helps d etermine where instruction pro c essing should resume when the exception handler returns control to the interrupted process .
Processor: Exception Processing Katana ® 752i User’s Manual 10006024-0 4 4-10 FP: Floating-Poi nt available . This bit is set on initial p ower-up. 0 = Prevent s floating-point instructions dispatch ( loads, stores, moves). 1 = Executes floating-poin t instructions.
Processor: Cache Memory 10006024-04 Katana ® 752i User’s Ma nual 4-11 CACHE MEMORY The 750GL proc essor provides bot h level 1 (L1) and level 2 ( L2) cache memory.
Processor: Cache Memory Katana ® 752i User’s Manual 10006024-0 4 4-12 L2DO: L2 Data-Only. Setting this bit inhibits the ca ching of instructio ns in the L2 cache. All accesses from the L 2 instruction cache are treated as cache-in hibited by the L2 cache.
Processor: JTAG/COP Headers 10006024-04 Katana ® 752i User’s Ma nual 4-13 JTAG/COP HEADERS The 750GL CPU provi des a dedicated user-accessi ble test access port (TAP) that is fully compatible with the IEEE 1149.1 Stand ard Test Access Port and Boundary Scan Architec- ture.
Processor: JTAG/COP Headers Katana ® 752i User’s Manual 10006024-0 4 4-14 15 CHKSTPO* Output Checkstop (halt ed) indication (see also Checkstop LED indicator, CR31, in Fig.
10006024-04 Katana ® 752i User’s Ma nual 5-1 Section 5 System Controller The Katana ® 752i processor complex consists of a processor (se e Chapter ) and a sy stem controller/PCI bridge devi ce with associated memory and input /output interfaces. Th is chapter describes the Marvell MV64460 system co ntroller/PCI bridge device implement a- tion.
System Controller: CPU Interface Katana ® 752i User’s Manual 10006024-0 4 5-2 Figure 5-1: MV64460 Block Diagram CPU INTERFACE CPU interface featu res include: • 32-bit address and 64-bit data bus.
System Controller: SDRAM Controller 10006024-04 Katana ® 752i User’s Ma nual 5-3 1 Read the CPU Configuratio n register. This guaran tees that all previous t ransactions in the CPU interface pipe are flushed. 2 Program the register to its new value.
System Controller: Internal (IDMA) Controller Katana ® 752i User’s Manual 10006024-0 4 5-4 INTERNAL (IDMA) CONTROLLER Each of the four DMA engines c an move data between any source and any desti nation, such as the SDRAM, device, PCI_0, or CPU bus.
System Controller: PCI Interface 10006024-04 Katana ® 752i User’s Ma nual 5-5 PCI Identification The Katana ® 752i has been assigne d the following P CI identifica tion numbers. Table 5-1: PCI Identification Values PCI Read/Write The MV64460 bec omes a PCI bus master when the CPU, IDMA, or MPSC SDMA s initiate a bus cycle to a PCI device.
System Controller: Doorbell Registers Katana ® 752i User’s Manual 10006024-0 4 5-6 monitor the state of th e PCI bus INTA* —INTD* signals (P CI1 only). The MV 64460 contain s registers that control th e masking, unmask ing, and priority of th e PMC interrupts as i nputs to the processor.
System Controller: On-Card Memory 10006024-04 Katana ® 752i User’s Ma nual 5-7 ON-CARD MEMORY The Katana ® 752i has various types of on-card m e mory to support the MV 64460 system controller and t he 750GL proce ssor. It has user Flash, SDRAM for data storage, and several serial EEPROMs for non-volatile memory storage.
System Controller: I2C Interface Katana ® 752i User’s Manual 10006024-0 4 5-8 EEPROMs The MV64460 u ses an 8-kilob yte serial EEPROM a t hex location 53 16 on the I 2 C bus to store configuration data .
System Controller: I2C Interface 10006024-04 Katana ® 752i User’s Ma nual 5-9 Figure 5-2: I 2 C Inte rface Diagram 0xA4 MV64460 i n iti a liz a tio n ROM 0xA6 NVRAM Co n fig ura ble a dd r ess th r.
System Controller: GPIO Signal Definitions Katana ® 752i User’s Manual 10006024-0 4 5-10 GPIO SIGNAL DEFINITIONS The MV64460 system co ntroller on the Katana ® 752i has 32 general-purpose input output (GPIO) pins that are used for variou s purpos es.
System Controller: Console Serial Port 10006024-04 Katana ® 752i User’s Ma nual 5-11 CONSOLE SERIAL PORT The processo r comp lex on the Katana ® 752i has an asy nchronous console serial port on the front panel. This port operates at EIA-232 signa l levels, but does not provide any han dshak- ing functionality.
Katana ® 752i User’s Manual 10006024-0 4 5-12 (blank page ).
10006024-04 Katana ® 752i User’s Ma nual 6-1 Section 6 Device Bus PLD The processor comple x on the Katana ® 752i has a programmable logic d evice (PLD) t hat provides control log ic for the 750GL device bus.
Device Bus PLD: Interrupt Registers Katana ® 752i User’s Manual 10006024-0 4 6-2 Register 6-2: Reset Command SCL: Direct control for I 2 C clock signal: 1=Tri-states the PLD 0=Drives logic low SDA:.
Device Bus PLD: Product Identification 10006024-04 Katana ® 752i User’s Ma nual 6-3 SREN: PCI SERR Enable interrupt routed from PCI SERR to MV6446 0: 1=Enabled to generat e an interrupt 0=Disabled .
Device Bus PLD: Revision Registers Katana ® 752i User’s Manual 10006024-0 4 6-4 Register 6-6: EReady ERdy: Monarch (read): 1=PCI devices ar e ready to be enumerated 0=PCI devices not ready to be en.
Device Bus PLD: Board Configuration Registers 10006024-04 Katana ® 752i User’s Ma nual 6-5 Note: Board Configuration 2 register is not implemente d in the Katana ® 752i.
Device Bus PLD: Other Registers Katana ® 752i User’s Manual 10006024-0 4 6-6 OTHER REGISTERS The IPMI Port Select register at hex loca tion F820,E000 16 allows access to the IPMI inter- face, as follows.
10006024-04 Katana ® 752i User’s Ma nual 7-1 Section 7 Real-Time Clock The processor complex on the Katana ® 752i has a stan dard real-ti me clock (RTC ), consistin g of an M41T00 device from STM icroelectronics.
Real-Time Clock: Clock Operation Katana ® 752i User’s Manual 10006024-0 4 7-2 1 Seconds register 2 Minutes register 3 Century/Hours register 4 Day register 5 Date register 6 Month register 7 Years register 8 Control register The M41T00 clock co ntinually monitors the suppl y voltage (Vcc) for an out of tolerance condition .
Real-Time Clock: Clock Operation 10006024-04 Katana ® 752i User’s Ma nual 7-3 ST: Stop bit 1=Stops t he oscill ator 0=Restarts the oscillator within one second CEB: Century Enable Bit 1=Causes CB t.
Katana ® 752i User’s Manual 10006024-0 4 7-4 (blank page ).
10006024-04 Katana ® 752i User’s Ma nual 8-1 Section 8 Local PCI Bus The Katana ® 752i utilizes the Periphera l Component In terconnect (PCI) bus a s the interface between the 750GL proc essor complex, PCI Telecom Me zzanine Card (PTMC) sites, optional T8110 ti me slot interchanger ( TSI), and 82544 Ethernet media access controller (MAC).
Local PCI Bus: Geographical Addressing Katana ® 752i User’s Manual 10006024-0 4 8-2 Table 8-1: ID Select Connections The T8110 TSI conne cts to INTD. The MV64 460 system controlle r connects to INTA. The Ethernet MAC connects to IN TD. The PCI devi ces on the PTMC module(s) use the following connections.
Local PCI Bus: PCI Bus Control Signals 10006024-04 Katana ® 752i User’s Ma nual 8-3 ACK64*, REQ64*: These sustained thre e-state output sign als tell a 64-bit PCI device whether to use the 64-bit or the 32-bit data wi dth. Since t he Katana ® 752i is a 32-b it board, these sig nals are tied off to indicate the 32-bit da ta width.
Local PCI Bus: PCI Bus Control Signals Katana ® 752i User’s Manual 10006024-0 4 8-4 PAR: PARITY. This is even parity ac ross AD00-AD31 and C/BE 0-C/BE3*.
10006024-04 Katana ® 752i User’s Ma nual 9-1 Section 9 PTMC Interface The Katana ® 752i Peripheral Compone nt Interconne ct (PCI) inte rface supports two PC I Telecom Mezzan ine Card (PTMC ) expansion sites. T his chapter des cribes how to inst all PTMC modules and provi des additional informat ion about the P TMC signals.
PTMC Interface: PTMC Installation Katana ® 752i User’s Manual 10006024-0 4 9-2 The following procedure describes how to attach a PTMC module to the Katana ® 752i base- board: 1 Remove the scre ws from the st andoffs on the PTMC module. 2 Hold the module at an angle and gentl y slide the facep late into the op ening on the baseboa rd.
PTMC Interface: PTMC Connector Pinouts 10006024-04 Katana ® 752i User’s Ma nual 9-3 PTMC CONNECTOR PINOUTS PCI expansion site #1 has fo ur 64-pin conne ctors, J11— J14 (see Fi g. 2-2 on page 2-3 for con- nector locations) . Table 9-1 shows the pin assignments.
PTMC Interface: PTMC Connector Pinouts Katana ® 752i User’s Manual 10006024-0 4 9-4 35 GND TRDY* CT_D14 J3_A7 36 IRDY* +3.3V no connection J3_E6 37 DEVSEL* GND CT_D12 J3_D6 38 +5V STOP* GND J3_C6 39 GND PERR* PTENB* J3_B6 40 LOCK* GND no connection J3_A6 41 SDONE* +3.
PTMC Interface: PTMC Connector Pinouts 10006024-04 Katana ® 752i User’s Ma nual 9-5 PCI expansion site #2 has fo ur 64-pin conne ctors, J21— J24 (see Fi g.
PTMC Interface: PTMC Connector Pinouts Katana ® 752i User’s Manual 10006024-0 4 9-6 37 DEVSEL* GND CT_D12 J5_D6 38 +5V STOP* GND J5_C6 39 GND PERR* PTENB* J5_B6 40 LOCK* GND no connection J5_A6 41 SDONE* +3.3V GND J5_E5 42 SBO* SERR* NETREF1 J5_D5 43 PAR CBE1* CT_C8B J5_C5 44 GND GN D GND J5_B5 45 +3.
10006024-04 Katana ® 752i User’s Ma nual 10-1 Section 10 Ethernet Interfaces The Katana ® 752i supports four 10/100/1000B aseT Ethernet ports. The MV6446 0 system controller provides three Ethe rnet Media Access Control (MAC) uni ts, and an Intel 82544EI Ethernet controller device pr ovides direct access from the local PCI bus.
Ethernet Interfaces: Ethernet Ports Katana ® 752i User’s Manual 10006024-0 4 10-2 001 = CPSB_1 (MA C address #2) 010 = CPSB_2 011 = FRN T_1 (ETH3) 100 = FRN T_2 (ETH4) 101 = reserved 110 = reserved 111 = reserved So for example, if the Katana ® 752i serial number is 1234, the CP SB_2 MAC address is: 00:80:F9:6 C:07:52.
Ethernet Interfaces: Optional RMII PHY Devices 10006024-04 Katana ® 752i User’s Ma nual 10-3 Table 10-2: 82544EI Ethernet Port Pin Assignments, ETH4 Table 10-3: MV64460 Ethernet Port Pin Assignment.
Ethernet Interfaces: Optional RMII PHY Devices Katana ® 752i User’s Manual 10006024-0 4 10-4 Figure 10-1: RMII PHY to Transition Mo dule PTMC Site 1 PTMC Site 2 J5 P13 P23 J5 Katana752i Optional Rear T ransition Module (i.e. TM/cSP AN-P8E) Magnetics Magnetics PHY 0x5 PHY 0x6 RMII RMII CR43 CR44 CR45 CR46 +2.
10006024-04 Katana ® 752i User’s Ma nual 11-1 Section 11 IPMI Controller The Katana ® 752i implements a System Management Bus ( SMB), as defined in the Com- pactPCI System Management Specificati on (see Table 1-2 ). It also supports the Intelligent Platform Management In terface (IPMI) Version 1.
IPMI Controller: SMB/IPMI Overview Katana ® 752i User’s Manual 10006024-0 4 11-2 The Katana ® 752i system management interfac e uses the Zircon PM devi ce’s general-pur- pose input/output (GPIO).
IPMI Controller: SMB/IPMI Overview 10006024-04 Katana ® 752i User’s Ma nual 11-3 Figure 11-1: IPMB Connections Block Diagram IPMB (SCL, SDA, PWR) Katana752i 3 MV64460 IPMI Microcontroller IPMI Bootcode ROM IPMI Bootloader and FRU ROM Volt age Monitor Reset A-to-D 1 A-to-D 2 A-to-D 3 A-to-D 4 A-to-D 5 A-to-D 6 5 V 3.
IPMI Controller: I/O Interface Katana ® 752i User’s Manual 10006024-0 4 11-4 I/O INTERFACE The Zircon PM provid es 24 user-definable input/output (I/O) pins.
IPMI Controller: I2C Interfaces 10006024-04 Katana ® 752i User’s Ma nual 11-5 In addition to the General Purpose I/O, th ere are six analog-to-digital (A2 D) input pins that are used for sensing th e variou s power supp lies on the board. The following table describes the Katana ® 752i implementat ion of these pins.
IPMI Controller: IPMI Message Protocol Katana ® 752i User’s Manual 10006024-0 4 11-6 The PICMG 2.9 specification defines addressing on the public and private IPMBs . It defines the slave addresses assigned to the chassis, pow er supplies, and periphe ral boards based on geographical ad dressing.
IPMI Controller: IPMI Message Protocol 10006024-04 Katana ® 752i User’s Ma nual 11-7 The first byte contain s the responder’s Slave Address, rsSA . The second byte contains the Network Function Code, netFn , and the responder’s Logical Unit Number, rsLUN .
IPMI Controller: IPMI Message Protocol Katana ® 752i User’s Manual 10006024-0 4 11-8 IPMI Network Function Codes All IPMI messages contain a Network Function Co de field, which defi nes the category for a particular comma nd. Each category h as two co des assigned to it–one for requests and one for responses.
IPMI Controller: IPMI Message Protocol 10006024-04 Katana ® 752i User’s Ma nual 11-9 IPMI Completion Codes All IPMI response messages cont ain a hexadecimal Completion Code fi eld that indicates the status of the operation . Table 11-7 lists the Completion Codes (a s defined in the IPMI s pecifi- cation) used by the Zircon P M.
IPMI Controller: IPMI Message Protocol Katana ® 752i User’s Manual 10006024-0 4 11-10 Zircon PM IPMI Commands The Zircon PM periphera l management control ler supports IPMI commands to query board information and to control th e behavior of the board.
IPMI Controller: IPMI Message Protocol 10006024-04 Katana ® 752i User’s Ma nual 11-11 The Zircon PM implements ma ny standard IPMI commands. P lea se refer to the IPMI specifi- cation (l isted in Table 1 -2 ) for details about each command’s request and respons e data.
IPMI Controller: IPMI Message Protocol Katana ® 752i User’s Manual 10006024-0 4 11-12 Table 11-9: Get Sensor Reading Parameters Type: Byte: Data Field: Request Data 1 Sensor Number (hex) 41=PMC 3.3V Voltage Monitor 42=CPU_CORE Voltage Monitor 43=1.
IPMI Controller: IPMI Message Protocol 10006024-04 Katana ® 752i User’s Ma nual 11-13 Response Data (continued) 4 Present Threshold Co mparison Status For threshold-based sensors: Bits[7:6], R eserved.
IPMI Controller: IPMI Message Protocol Katana ® 752i User’s Manual 10006024-0 4 11-14 Master Write-Read I 2 C (Application) The Master Write-Read I 2 C command allows for direct accesses to I 2 C devices. This com- mand can read from or write to any of the Zircon PM’s private I 2 C devices, such as SROMs or temperature sensors.
IPMI Controller: IPMI Message Protocol 10006024-04 Katana ® 752i User’s Ma nual 11-15 Write Setting (OEM) The Write Setting command provides the ab ility to write a v alue to a general-pu rpose input/output (GPIO) pin on the Zi rcon PM. By to ggling certain GP IO pi ns, software can reset or power-down the board.
IPMI Controller: IPMI Message Protocol Katana ® 752i User’s Manual 10006024-0 4 11-16 Read Setting (OEM) The Read Setting command pro vides the abilit y to read the value of a general-purpo se input/output (GPIO) pin o n the Zircon PM. Soft wa re can read certain GPIO pins to deter- mine if the board is in reset or powered-down.
IPMI Controller: IPMI Message Protocol 10006024-04 Katana ® 752i User’s Ma nual 11-17 Set Heartbeat (OEM) The Set Heartbeat command configures the Zircon PM to send a heartbeat message to a receiver on the IPMB or privat e I 2 C bus at a specific interval.
IPMI Controller: IPMI Message Protocol Katana ® 752i User’s Manual 10006024-0 4 11-18 Get Heartbeat (OEM) The Get Heartbeat command return s the current configuration of the heartbeat func tion for a specified interface. The r esponse data has the same definition as the Set Hear tbeat request data (see Sectio n ).
IPMI Controller: IPMI Message Protocol 10006024-04 Katana ® 752i User’s Ma nual 11-19 IPMI FRU In formation The Zircon P M stores Fie ld Replaceab le Unit (FRU) informati on in its boot memory ( SROM). The data structure co ntains information such as th e product name, part number, serial number, and manufacturing date.
IPMI Controller: IPMI Message Protocol Katana ® 752i User’s Manual 10006024-0 4 11-20 IPMI Device SDR Repository The Zircon PM implements a De vice SDR Repository that contains Sensor D ata Records for the Zircon PM, the FRU device, and each sensor.
IPMI Controller: IPMI Message Protocol 10006024-04 Katana ® 752i User’s Ma nual 11-21 Event-generating sensors with a Threshold Event/Read ing Type (0x01 ) initiate an event message when a sensor reading crosses the define d threshold.
IPMI Controller: IPMI Message Protocol Katana ® 752i User’s Manual 10006024-0 4 11-22 The Event Dat a 0 byte has three fields: Bi ts 7:6 describe the cont ents of Event Data 1 (set t o 10 2 when an OEM code is present in Event Data 1). Bits 5:4 d escribe the content s of Event Data 2 (also set to 10 2 when an OEM code is present).
10006024-04 Katana ® 752i User’s Ma nual 12-1 Section 12 Hot Swap The Katana ® 752i baseboard incorpora tes a Linear Tec hnologies LTC 1643L Hot Swap ™ con- troller device and is ful ly compliant with the CompactPCI (cPCI) Hot Swap Specification (se e references in Table 1-2 ).
Hot Swap: cPCI Functionality Katana ® 752i User’s Manual 10006024-0 4 12-2 CPCI FUNCTIONALITY The Katana ® 752i implements an optiona l jumper, JP1 (s ee Fig. 2- 4 ), which can en able or dis- able the board’s cPCI funct ionality. By default, cPCI is enabled (jumpers placed on J P1, pins 1—2 and pins 7—8) .
Hot Swap: Hot Swap LED and Ej ector Switch Control 10006024-04 Katana ® 752i User’s Ma nual 12-3 The Hot Swap logic funct ions as follows when a board is removed from a slot: 1 The operator opens the b oard’s ejector hand les and the PCI0_HS signals goes low to indicate th at the board is a bout to be ex tracted.
Hot Swap: Hot Swap LED and Ej ector Switch Control Katana ® 752i User’s Manual 10006024-0 4 12-4 Non-cPCI Hot Swap When the cPCI funct ionality is disabled, the L ED/ejector switch cont rol mechanism works in conjunction wi th the Power Good indicati on fr om the Hot Swap contro ller circuit, as shown in Fig.
Hot Swap: Timing Considerations 10006024-04 Katana ® 752i User’s Ma nual 12-5 low (active) . This occurs when powe r supply voltages are not within th e proper toleran ce or when the BDSEL* signal is not driven low (activ e) to the Hot Swap controll er.
Hot Swap: HEALTHY* Signal Katana ® 752i User’s Manual 10006024-0 4 12-6 HEALTHY* SIGNAL The Katana ® 752i logic asserts the HEAL THY* signal when ever the Hot Swa p controller indi - cates that all power sup plies provided by the ba ckplane are within the appropriate range.
10006024-04 Katana ® 752i User’s Ma nual 13-1 Section 13 CT Bus Interface The Katana ® 752i supports an optional co mputer telephony ( CT) bus interface th at routes various signal s from the CompactPCI J4 backpl ane connector to the PCI T elecom Mezza- nine Card (PTMC) expansion sites.
CT Bus Interface: Katana®752i CT Bus Options Katana ® 752i User’s Manual 10006024-0 4 13-2 • User Managed Combination (UMC) UMC indicates combinations that are not to be made casu ally, since th ey may not be com- patible. Pot ential devic e destruction must be assumed for the se combinatio ns.
CT Bus Interface: Signal Control 10006024-04 Katana ® 752i User’s Ma nual 13-3 Figure 13-1: Typical System Clocking Model SIGNAL CONTROL The Katana ® 752i supports control signals that allow a PTMC site to master the CT clocks and/or data.
CT Bus Interface: CT Bus Routing Withou t the T8110 (option 1) Katana ® 752i User’s Manual 10006024-0 4 13-4 CT BUS ROUTING WITHOUT THE T8110 (OPTION 1) The Katana ® 752i option 1 routes the NETRE.
CT Bus Interface: CT Bus Routing Withou t the T8110 (option 1) 10006024-04 Katana ® 752i User’s Ma nual 13-5 Figure 13-2: CT Signal Routing Diagram —T8110 Not Installed (option 1) PM/3Gv J23 P23 .
CT Bus Interface: CT Bus Routing With th e T8110 Installed (option 2) Katana ® 752i User’s Manual 10006024-0 4 13-6 CT BUS ROUTING WITH THE T8110 INSTALLED (OPTION 2) The T8110 Ti me Slot Intercha nger (TSI) is a PCI device that se rves as a brid ge between th e H.
CT Bus Interface: CT Bus Routing With th e T8110 Installed (option 2) 10006024-04 Katana ® 752i User’s Ma nual 13-7 Local CT Bus Operation On the Katana ® 752i, option 2, the loca l CT clock mast er must always be the T8110. The two PTMC sites canno t be local CT bus masters (p rimary or secondary).
CT Bus Interface: CT Bus Routing With th e T8110 Installed (option 2) Katana ® 752i User’s Manual 10006024-0 4 13-8 Figure 13-3: CT Signal Routing Diagram —T8110 Installed (option 2) H.
10006024-04 Katana ® 752i User’s Ma nual 14-1 Section 14 Backplane Signals This chapter describes the Katana ® 752i board’ s backplane signal s. It lists the pinouts for connecto rs J1, J2, J3, J4 , and J5 on th e CompactPC I backplane.
Backplane Signals: Pinouts Katana ® 752i User’s Manual 10006024-0 4 14-2 PINOUTS J1 is a 110-pin female connector (Eme rson #01899062-00) that routes power su pply source signals from the Com pactPCI backpl ane, and cPCI and IPMI signals to t he CompactPCI backplane, as listed in th e following table.
Backplane Signals: Pinouts 10006024-04 Katana ® 752i User’s Ma nual 14-3 J2 is a 110-pin female connect or (Emerson #0 1899063-00 ) that routes cPCI , Geographical Address, and power signals from the CompactPCI backpl ane, as listed in th e table below.
Backplane Signals: Pinouts Katana ® 752i User’s Manual 10006024-0 4 14-4 J3 is a 95-pin female connec tor (Emerson #01899064-00) t hat routes cPSB Ethernet differ- ential signal s and PTMC site #1 user I/O si gnals to the cPCI ba ckplane, as li sted in the table below.
Backplane Signals: Pinouts 10006024-04 Katana ® 752i User’s Ma nual 14-5 J4 is an optional 90-pin fema le connector (Emerson #0189907 0-00) that routes CT signals between the PTMC sites and the cPCI backpl ane, as listed in the table below.
Backplane Signals: Pinouts Katana ® 752i User’s Manual 10006024-0 4 14-6 J5 is a 110-pin femal e connect or (Emerson #0 1899063-00) t hat routes PTMC si te user I/O and Ethernet signals to th e cPCI backplane, as listed in the table below. Figure 14-1: cPCI Connector Pin Assignments, J5 Pin: Row A: Row B: Row C: Row D: Row E: 22 PMC1_ENET_TXP 3.
10006024-04 Katana ®752i User’s Manual 15-1 Section 15 Monitor The Katana®752 i monitor is based on the Embedded P owerPC Linux Boot Proj ect ( PPC- Boot ) boot program, availabl e unde r the GNU General Public Lice nse (GPL). For instructions on how to obtain the source code for this GPL program, please visit http://www.
Monitor: Command-Line Features Katana ®752i User’s Manual 10006024-04 15-2 Figure 15-1: Example Monitor Start-up Disp lay PPCBoot 1.2.0 (Oct 31 2007 - 12:52:52)1.7s CPU: 750GX v1.2 @ 900 MHz Board: Katana752i BusHz: 200000000 I2C: ready DRAM: 512MB DDR SDRAM in slot 0 VM485L6523C-CC Early setup ECC (Clearing.
Monitor: Basic Operation 10006024-04 Katana ®752i User’s Manual 15-3 BASIC OPERATION The Katana®752 i monitor performs various conf igurat ion tasks upon power-up or reset. This section describes the monito r operation during init ialization of the Kata na®752i board.
Monitor: Basic Operation Katana ®752i User’s Manual 10006024-04 15-4 Figure 15-2: Power-up/Reset Sequence Flowchart RESET Initialize HID0 Initialize M SR Relo cate the ba se of the MV6446 0 interna.
Monitor: Basic Operation 10006024-04 Katana ®752i User’s Manual 15-5 Power-Up Timing Upon power-up, the Katan a®752i initiall y retries cPCI cycles for a spe cific period of time (see “cPCI/PCI Stop Retries, Memory Read Access Only” monitor state in the tables below).
Monitor: Basic Operation Katana ®752i User’s Manual 10006024-04 15-6 POST Diagnostic Results The Katana®752 i stores Power-On Self-T est (P OST) diagnost ic results in I 2 C nonvolatile random-access memory (NVRAM). This me mory is located in the EE PROM at hex address 0x53 on the I 2 C bus.
Monitor: Monitor Recovery and Updates 10006024-04 Katana ®752i User’s Manual 15-7 MONITOR RECOVERY AND UPDATES Note: The monitor provides VxWorks 6 .0 support for Erro r Data and Reporting (EDNR). This feature allocates a per- sistent area of memory that retains its contents after a systerm soft reset.
Monitor: Monitor Command Reference Katana ®752i User’s Manual 10006024-04 15-8 3 Update the monitor: [Katana 752i (1.0)] => moninit seria l# 100000 4 Reset the mo nitor: [Katana 752i (1.0)] => reset 5 Reset the en vironment para meters: [Katana 752i (1.
Monitor: Boot Commands 10006024-04 Katana ®752i User’s Manual 15-9 However, com mands cannot be abbreviate d when accessing on-line help. You must type help an d the full comman d name. Command Help Access the monitor online help for each command by t yping help < command > .
Monitor: Boot Commands Katana ®752i User’s Manual 10006024-04 15-10 3 The host board finally write s 0x596F4F6B (charact er string “YoOk”) to MagicL oc to show that the appli cation is ready for the target. 4 The target writ es value 0x427965 21 (character stri ng “Bye!”) to Magi cLoc to show tha t the application was found.
Monitor: Boot Commands 10006024-04 Katana ®752i User’s Manual 15-11 Definition: bootp [ loadAd dress ] [ bootfilename ] bootv The bootv command checks the c hecksum on the p rimary image (i n Flash) and b oots it, if valid. If it is not vali d, it checks the checksum on the secondary i mage (in Flash) and boots it, if valid.
Monitor: JFFS2 File Systems Katana ®752i User’s Manual 10006024-04 15-12 JFFS2 FILE SYSTEMS This section describes the commands for th e read-only JFFS2 file systems.
Monitor: Memory Commands 10006024-04 Katana ®752i User’s Manual 15-13 cmp The cmp command co mpares count objects between addr1 and addr2 . Any differences are displayed o n the console display. Definition: cmp [.b, .w, .l] addr1 addr2 count cp The cp command copies count objects located at the source address to the target address.
Monitor: Memory Commands Katana ®752i User’s Manual 10006024-04 15-14 00080020: ffff ffff ffff ffff ffff ffff ffff ffff ... ............. 00080030: ffff ffff ffff ffff ffff ffff ffff ffff ... ............. mm The mm command modifies me mory one objec t at a time.
Monitor: Flash Commands 10006024-04 Katana ®752i User’s Manual 15-15 00080020: ffffffff ffffffff ffffffff ff ffffff ................ 00080030: ffffffff ffffffff ffffffff ff ffffff ................ 00080040: ffffffff ffffffff ffffffff ff ffffff ....
Monitor: EEPROM / I2C Commands Katana ®752i User’s Manual 10006024-04 15-16 protect The protect com mand enables or disables the Flash se ctor protection for the specified Flash sector. Protection is implemented using soft ware only. The protec tion mechanism inside the physical Flash part i s not being used.
Monitor: EEPROM / I2C Commands 10006024-04 Katana ®752i User’s Manual 15-17 icrc32 The icrc32 computes a CRC32 checksum. Definition: icrc32 chip _ a ddress [.0, .1, .2] count iloop The iloop command reads in an i nfinite loop on the specified address range.
Monitor: Ethernet Controller EEPROM Commands Katana ®752i User’s Manual 10006024-04 15-18 iprobe The iprobe command probes to discover vali d I 2 C chip ad dresses. Definition: iprobe ETHERNET CONTROLLER EEPROM COMMANDS This section describes the comma nds that provide access to the EEPROM for the Intel 82544EI Ethernet Co ntroller.
Monitor: Environment Parameter Commands 10006024-04 Katana ®752i User’s Manual 15-19 envinit The envinit command resets the NVRAM and serial number.
Monitor: Test Commands Katana ®752i User’s Manual 10006024-04 15-20 TEST COMMANDS The commands describe d in this section perform diagnostic an d memory tests. diags The diags command runs th e power-on self test (POST) . Definition: diags mtest The mtest command perf orms a simp le SDRAM read/write test.
Monitor: Other Commands 10006024-04 Katana ®752i User’s Manual 15-21 coninfo The coninfo command displays the information for all av ailable console devices. Definition: coninfo crc16 The crc16 command computes a CRC16 checksum on size bytes starting at buff .
Monitor: Other Commands Katana ®752i User’s Manual 10006024-04 15-22 frusetuser The frusetuser command writes count bytes to offset in the FRU user area and copies the bytes to storag e.
Monitor: Other Commands 10006024-04 Katana ®752i User’s Manual 15-23 getpcimode The getpcimode command shows how many Configuration Spa ce Headers the Katana®752i is repo rting on PCI/ cPCI. Single Function means only Funct ion 0 is availabl e. Multi Function indicates that multipl e functions (i.
Monitor: Other Commands Katana ®752i User’s Manual 10006024-04 15-24 isdram The isdram command displa ys the SDRAM configurat ion information ( valid chip value s range from 50 to 57). Definition: isdram loop The loop command executes an infinite loop on address range.
Monitor: Other Commands 10006024-04 Katana ®752i User’s Manual 15-25 Modify, read, and k eep the CFG address. pci next[.b, .w, .l] b.d.f address Modify automatically increment the CFG address. pci modify[.b, .w, .l] b.d.f address Write to the CFG address.
Monitor: Other Commands Katana ®752i User’s Manual 10006024-04 15-26 Setting PCI Mode to Multi ... Complete => setspr The setspr command sets the contents of the SP R register specified by SPR_ID to SDR_Value . Definition: setspr SPR_ID SPR_Value script The script command runs a list of moni tor commands out of memory.
Monitor: Environment Variables 10006024-04 Katana ®752i User’s Manual 15-27 version The version command displa ys the mo nito r’s current version number. Definition: version ENVIRONMENT VARIABLE S The following tabl e lists the monit or’s standard environment varia bles.
Monitor: Environment Variables Katana ®752i User’s Manual 10006024-04 15-28 cpci_remap 8000000 0 Base address in cPCI space for memory window specified by cpci_memsize (i.
Monitor: Environment Variables 10006024-04 Katana ®752i User’s Manual 15-29 The monitor supports optional environment v ari ables that e nable addition al functionalit y. The moninit command ( see Section ) onl y affects the standard en vironment varia bles and does not set any parameters for these optio nal variables.
Monitor: Troubleshooting Katana ®752i User’s Manual 10006024-04 15-30 TROUBLESHOOTING To bypass the full board in itialization sequ ence, attach a terminal to the conso le located on the front of the module.
10006024-04 Katana ®752i User’s Manual 16-1 Section 16 Acronyms ASCII American Standard C ode for Information Interchang e BMC Baseboard Management Controller Cmd Command code COP Common On Chip cP.
Acronyms: Katana ®752i User’s Manual 10006024-04 16-2 IDMA Internal Direc t Memory Access IEC International Ele ctrotechnical Commission IEEE Institute of Electrical and Electronics Engineers IP In.
Acronyms: 10006024-04 Katana ®752i User’s Manual 16-3 SERDES Serializer/Deserializer SGMII Serial Gigabit Media Ind ependent Interface SMS System Management Software SO-DIMM Small-Outline Dual In-l.
Katana ®752i User’s Manual 10006024-04 16-4 (blank page ).
10006024-04 Katana ® 752i User’s Manual i-1 Index A acronyms . . . . . . . . . . . . . . . . . . . 16-1 B binary download format . . . . . . .15-30 block diagram CPU . . . . . . . . . . . . . . . . . . . . . . . 4-2 CPU reset . . . . . . . . . . . .
Index (continued) Katana ® 752i User’s Manual 10006024-04 i-2 memory commands . . . . . . . .15-12 Motorola S-record . . . . . . . . .15-30 other commands . . . . . . . . . .15-20 power-up/reset sequence flowchart 15-4 PPCBOOT . . . . . . . . . . .
Index (continued) 10006024-04 Katana ® 752i User’s Manual i-3 S serial number location . . . . . . . . . . . . . . . . . . . . 2-7 user ROM . . . . . . . . . . . . . . . . . . 2-7 serial port, console . . . . . . . . . . . . 5-11 setup requirements .
Katana ® 752i User’s Manual 10006024-04 i-4 (blank page ).
10006024-04 Katana ®752i User’s Manual Notes ____________ __________ _____________ _____________ __________ ____________ ___________ ___________ ____________ __________ _____________ _____________ .
Emerson Netwo rk Power, Embedded Co mputing 8310 Excelsior Drive ■ Madison, WI 53717-1935 USA US Toll Free: 1-800-356-9602 ■ Voice: +1-608-831-5500 ■ FAX: 1-608-831-4249 Email: info@ar tesyncp.
Un punto importante, dopo l’acquisto del dispositivo (o anche prima di acquisto) è quello di leggere il manuale. Dobbiamo farlo per diversi motivi semplici:
Se non hai ancora comprato il Emerson 752I è un buon momento per familiarizzare con i dati di base del prodotto. Prime consultare le pagine iniziali del manuale d’uso, che si trova al di sopra. Dovresti trovare lì i dati tecnici più importanti del Emerson 752I - in questo modo è possibile verificare se l’apparecchio soddisfa le tue esigenze. Esplorando le pagine segenti del manuali d’uso Emerson 752I imparerai tutte le caratteristiche del prodotto e le informazioni sul suo funzionamento. Le informazioni sul Emerson 752I ti aiuteranno sicuramente a prendere una decisione relativa all’acquisto.
In una situazione in cui hai già il Emerson 752I, ma non hai ancora letto il manuale d’uso, dovresti farlo per le ragioni sopra descritte. Saprai quindi se hai correttamente usato le funzioni disponibili, e se hai commesso errori che possono ridurre la durata di vita del Emerson 752I.
Tuttavia, uno dei ruoli più importanti per l’utente svolti dal manuale d’uso è quello di aiutare a risolvere i problemi con il Emerson 752I. Quasi sempre, ci troverai Troubleshooting, cioè i guasti più frequenti e malfunzionamenti del dispositivo Emerson 752I insieme con le istruzioni su come risolverli. Anche se non si riesci a risolvere il problema, il manuale d’uso ti mostrerà il percorso di ulteriori procedimenti – il contatto con il centro servizio clienti o il servizio più vicino.
