Manuale d’uso / di manutenzione del prodotto CY7C1383FV25 del fabbricante Cypress
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18-Mbit (512K x 36/1M x 18) Flow-Through SRAM CY7C1381DV25, CY7C1381FV25 CY7C1383DV25, CY7C1383FV25 Cypress Semiconductor Corpora tion • 198 Champion Cou rt • San Jose , CA 95134-1 709 • 408-943-2 600 Document #: 38-05547 Rev . *E Revised Feburary 14, 2007 Features • Supports 133 MHz bus operations • 512K x 36/1M x 18 co mmon IO • 2.
CY7C1381DV25, CY7C1381FV25 CY7C1383DV25, CY7C1383FV25 Document #: 38-05547 Rev . *E Page 2 of 28 Logic Block Diagram – CY7C1381DV25 /CY7C1381FV25 [3 ] (512K x 36) Logic Block Diagram – CY7C1383DV2.
CY7C1381DV25, CY7C1381FV25 CY7C1383DV25, CY7C1383FV25 Document #: 38-05547 Rev . *E Page 3 of 28 Pin Configurations A A A A A 1 A 0 NC NC V SS V DD A A A A A A A A DQP B DQ B DQ B V DDQ V SSQ DQ B DQ .
CY7C1381DV25, CY7C1381FV25 CY7C1383DV25, CY7C1383FV25 Document #: 38-05547 Rev . *E Page 4 of 28 Pin Configurations (continued) 234 5 6 7 1 A B C D E F G H J K L M N P R T U V DDQ NC/288M NC/144M DQP .
CY7C1381DV25, CY7C1381FV25 CY7C1383DV25, CY7C1383FV25 Document #: 38-05547 Rev . *E Page 5 of 28 Pin Configurations (continued) 165-Ball FBGA Pinout (3 Chip Enable) CY7C1381DV25 (512 K x 36) 234 567 1.
CY7C1381DV25, CY7C1381FV25 CY7C1383DV25, CY7C1383FV25 Document #: 38-05547 Rev . *E Page 6 of 28 Pin Definitions Name IO Description A 0 , A 1 , A Input- Synchronous Address inputs used to select one of the address locations . Sampled at the rising edge of the CLK if ADSP or ADSC is active LOW , and CE 1 , CE 2 , and CE 3 [2] are sampled active.
CY7C1381DV25, CY7C1381FV25 CY7C1383DV25, CY7C1383FV25 Document #: 38-05547 Rev . *E Page 7 of 28 Functional Overview All synchronous inpu ts pass through input registers controlled by the rising edge of the clock. Maximum a ccess delay from the clock rise (t CDV ) is 6.
CY7C1381DV25, CY7C1381FV25 CY7C1383DV25, CY7C1383FV25 Document #: 38-05547 Rev . *E Page 8 of 28 and the IOs must be tri-stated prior to the presentation of data to DQs. As a safety precauti on, the data lines are tri-stated once a write cycle is detected, regardless of the st ate of OE .
CY7C1381DV25, CY7C1381FV25 CY7C1383DV25, CY7C1383FV25 Document #: 38-05547 Rev . *E Page 9 of 28 T ruth T able [4, 5, 6, 7, 8] Cycle Description Address Used CE 1 CE 2 CE 3 ZZ ADSP ADSC ADV WRITE OE C.
CY7C1381DV25, CY7C1381FV25 CY7C1383DV25, CY7C1383FV25 Document #: 38-05547 Rev . *E Page 10 of 28 T ruth T able for Read/Write [4, 9] Function (CY7C1381DV25 /CY7C1381FV25) GW BWE BW D BW C BW B BW A R.
CY7C1381DV25, CY7C1381FV25 CY7C1383DV25, CY7C1383FV25 Document #: 38-05547 Rev . *E Page 1 1 of 28 IEEE 1 149.1 Serial Boundary Scan (JT AG) The CY7C1381DV25/C Y7C1383DV25 incorporate s a serial boundary scan test access port (T AP). This part is fully compliant with 1 14 9.
CY7C1381DV25, CY7C1381FV25 CY7C1383DV25, CY7C1383FV25 Document #: 38-05547 Rev . *E Page 12 of 28 When the T AP controller is in the Capture -IR state, the two least significant bits are loaded with a binary ‘01’ pattern to allow for fault isolati on of the board level serial test data path.
CY7C1381DV25, CY7C1381FV25 CY7C1383DV25, CY7C1383FV25 Document #: 38-05547 Rev . *E Page 13 of 28 the T AP co ntroller , it will direct ly control the state of the output (Q-bus) pins, when the EXTEST is entered as the current instruction. When HIGH, it will en able the output buffers to drive the output bus.
CY7C1381DV25, CY7C1381FV25 CY7C1383DV25, CY7C1383FV25 Document #: 38-05547 Rev . *E Page 14 of 28 2.5V T AP AC T est Conditions Input pulse levels ........................ .............. ...........V SS to 2.5V Input rise and fall time .............. .
CY7C1381DV25, CY7C1381FV25 CY7C1383DV25, CY7C1383FV25 Document #: 38-05547 Rev . *E Page 15 of 28 Identification Codes Instruction Code Description EXTEST 0 00 Captures IO ring contents. Places th e boundary scan register between TDI and TDO. Forces all SRAM outputs to High-Z state.
CY7C1381DV25, CY7C1381FV25 CY7C1383DV25, CY7C1383FV25 Document #: 38-05547 Rev . *E Page 16 of 28 165-Ball BGA Boundary Scan Order [13, 15] Bit # Ball ID Bit # Ball ID Bit # Ball ID 1 N6 31 D10 61 G1 .
CY7C1381DV25, CY7C1381FV25 CY7C1383DV25, CY7C1383FV25 Document #: 38-05547 Rev . *E Page 17 of 28 Maximum Ratings Exceeding the maximum ratings may impair the useful life of the device. For user guideline s, not tested. S torage T emperature .........
CY7C1381DV25, CY7C1381FV25 CY7C1383DV25, CY7C1383FV25 Document #: 38-05547 Rev . *E Page 18 of 28 Cap acit ance [18] Parameter Description T est Conditio ns 100 TQFP Package 1 19 BGA Package 165 FBGA Package Unit C IN Input Capa citance T A = 25°C, f = 1 MHz, V DD /V DDQ = 2.
CY7C1381DV25, CY7C1381FV25 CY7C1383DV25, CY7C1383FV25 Document #: 38-05547 Rev . *E Page 19 of 28 Switching Characteristics Over the Operating Range [19, 20] Parameter Descriptio n 133 MHz 100 MHz Unit Min. Max. Min. Max. t POWER V DD (T ypical) to the first Access [21] 11 m s Clock t CYC Clock Cycle T ime 7.
CY7C1381DV25, CY7C1381FV25 CY7C1383DV25, CY7C1383FV25 Document #: 38-05547 Rev . *E Page 20 of 28 Ti ming Diagrams Read Cycle Timing [25] t CYC t CL CLK t ADH t ADS ADDRESS t CH t AH t AS A1 t CEH t C.
CY7C1381DV25, CY7C1381FV25 CY7C1383DV25, CY7C1383FV25 Document #: 38-05547 Rev . *E Page 21 of 28 Write Cycle T iming [25, 26] Ti ming Diagrams (continued) t CYC t CL CLK t ADH t ADS ADDRESS t CH t AH.
CY7C1381DV25, CY7C1381FV25 CY7C1383DV25, CY7C1383FV25 Document #: 38-05547 Rev . *E Page 22 of 28 Read/Write Cycle Timing [25, 27, 28] Ti ming Diagrams (continued) t CYC t CL CLK t ADH t ADS ADDRESS t.
CY7C1381DV25, CY7C1381FV25 CY7C1383DV25, CY7C1383FV25 Document #: 38-05547 Rev . *E Page 23 of 28 ZZ Mode T iming [29, 30] Ti ming Diagrams (continued) t ZZ I SUPPLY CLK ZZ t ZZREC ALL INPUTS (except ZZ) DON’T CARE I DDZZ t ZZI t RZZI Outputs (Q) High-Z DESELECT or READ Only Notes 29.
CY7C1381DV25, CY7C1381FV25 CY7C1383DV25, CY7C1383FV25 Document #: 38-05547 Rev . *E Page 24 of 28 Ordering Information Not all of the speed, package, and temperature rang es are availabl e. Please contact your local sales representa tive or visit www .
CY7C1381DV25, CY7C1381FV25 CY7C1383DV25, CY7C1383FV25 Document #: 38-05547 Rev . *E Page 25 of 28 Package Diagrams Figure 1. 100-Pin Thin Plastic Quad Flat pack (14 x 20 x 1.4 mm) (51-85050) NOTE: 1. JEDEC STD REF MS-026 2. BODY LENGTH DIMENSION DOES NOT INCLUDE MOLD PROTRUSION/END FLASH MOLD PROTRUSION/END FLASH SHALL NOT EXCEED 0.
CY7C1381DV25, CY7C1381FV25 CY7C1383DV25, CY7C1383FV25 Document #: 38-05547 Rev . *E Page 26 of 28 Figure 2. 1 19-Ball BGA ( 14 x 22 x 2.4 mm) (51-851 15) Package Diagrams (continued) 51-851 15-*B [+] .
CY7C1381DV25, CY7C1381FV25 CY7C1383DV25, CY7C1383FV25 Document #: 38-05547 Rev . *E Page 27 of 28 © Cypress Semicon ductor Corpor ation, 2006- 2007. The inform ation cont ained herein is subject to change wi thout notic e.
CY7C1381DV25, CY7C1381FV25 CY7C1383DV25, CY7C1383FV25 Document #: 38-05547 Rev . *E Page 28 of 28 Document History Page Document Title: CY7C1381DV25/CY7C1383DV25/CY7C13 81FV25/CY7C1 383FV25, 18-Mb it (512K x 36/1M x 18) Flow-Through SRAM Document Number: 38-05547 REV .
Un punto importante, dopo l’acquisto del dispositivo (o anche prima di acquisto) è quello di leggere il manuale. Dobbiamo farlo per diversi motivi semplici:
Se non hai ancora comprato il Cypress CY7C1383FV25 è un buon momento per familiarizzare con i dati di base del prodotto. Prime consultare le pagine iniziali del manuale d’uso, che si trova al di sopra. Dovresti trovare lì i dati tecnici più importanti del Cypress CY7C1383FV25 - in questo modo è possibile verificare se l’apparecchio soddisfa le tue esigenze. Esplorando le pagine segenti del manuali d’uso Cypress CY7C1383FV25 imparerai tutte le caratteristiche del prodotto e le informazioni sul suo funzionamento. Le informazioni sul Cypress CY7C1383FV25 ti aiuteranno sicuramente a prendere una decisione relativa all’acquisto.
In una situazione in cui hai già il Cypress CY7C1383FV25, ma non hai ancora letto il manuale d’uso, dovresti farlo per le ragioni sopra descritte. Saprai quindi se hai correttamente usato le funzioni disponibili, e se hai commesso errori che possono ridurre la durata di vita del Cypress CY7C1383FV25.
Tuttavia, uno dei ruoli più importanti per l’utente svolti dal manuale d’uso è quello di aiutare a risolvere i problemi con il Cypress CY7C1383FV25. Quasi sempre, ci troverai Troubleshooting, cioè i guasti più frequenti e malfunzionamenti del dispositivo Cypress CY7C1383FV25 insieme con le istruzioni su come risolverli. Anche se non si riesci a risolvere il problema, il manuale d’uso ti mostrerà il percorso di ulteriori procedimenti – il contatto con il centro servizio clienti o il servizio più vicino.
